[LinuxBIOS] [PATCH] Intel 44BX RAM initialization framework

Corey Osgood corey_osgood at verizon.net
Mon Apr 2 03:15:44 CEST 2007

One possible bug:

	/* 3. Perform 8 refresh cycles. Wait tRC each time. */
	PRINT_DEBUG("RAM Enable 3: CBR\r\n");
	for (i = 0; i < 8; i++) {
		do_ram_command(ctrl, RAM_COMMAND_CBR, 0);

Don't do_ram_command() in the loop, all you need to do are the memory
reads and waits, not send CBR to SDRAMC. Also, LinuxBIOSv1 doesn't do
any delay between the reads, I don't think. Check out
src/sdram/generic_sdram_enable.inc and
northbridge/intel/440bx/raminit.inc. I found this a few days ago, but
haven't had time to try it (or even follow it all the way) yet. There
are also a few things in the v1 bitworks ims mainboard.c that might be


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