[LinuxBIOS] Is the Cache as Ram for Gx2 processor?

Tom Sylla tsylla at gmail.com
Sun Apr 8 07:32:30 CEST 2007

Segher Boessenkool wrote:
>> As Hao is suspecting, AMD64 CAR won't work on Geode.
>> There isn't anything in LB to do CAR (but it would be possible).
> Could you give a quick description how cache-as-RAM
> should be done on a Geode?  Nothing detailed, just
> the outline.

Well, the outline is the same as the one used for AMD64 CAR: "Cache 
Initialization For General Storage During Boot" in the BKDG.

The registers are all different though, so it is more of a translation. 
DRAM base/limit translate to routing in the GLIUs, MTRRS translate to 
RCONFs in the CPU.

The current CAR code modifies that cacheability rules and mappings with 
fixed, variable, and default type MTRRs. The code is generic, except for 
one AMD64-specific MSR. I don't see why it wouldn't work on any proc 
with x86-compatible MTRRs.

Geodes don't have compatible MTRRs, they have "Region Configs" (RCONFS). 
There are fixed, variable, and default RCONFs, so the functionality 
needed is all there. The RCONFs are MSR accessible, just like MTRRs, but 
they are not at the same addresses, and do not have the same 
definitions. The region configs are all documented in the GX and LX 

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