segher at kernel.crashing.org
Sun Aug 19 01:00:33 CEST 2007
>> I am a little confused about the significance of the row_offset in the
>> i82810 raminit.c.
>> 1. What do you mean by row? Each row of DRAM technologies (Side) or
>> each row of DIMM (Socket)?? Two different things.
> "GMCH supports 4 physical rows of system memory in 2 DIMMs. The width
> a row is 64 bits. The DRAM Row Population Register defines the
> population of each Side of each DIMM." - from Intel® 82810/82810-DC100
> a row in the intel datasheets is always one side of a memory module.
More common (and way less confusing) terms for "physical row"
are "rank" and "chip select" (the latter isn't fully technically
correct of course, a rank is what a chip select connects to --
but people use the term anyway and it is obvious what they mean).
Maybe this clears up things a bit -- if the opposite, please
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