[LinuxBIOS] different versions of the GA-M57SLI-S4 (PLCC vs SPI)

echelon at free.fr echelon at free.fr
Sun Dec 2 16:08:12 CET 2007


 Great work Richard!
 In fact what you have found, confirms the theory of one of my cow-workers that
sometimes MB manufacturers ask chip makers to issue "custom" revisions for some
types of components used in new series of a MB. (Of course the specs of these
revisions remain strictly confidential naturally.. why they do this one can
simply wonder.. after all business is business so what?!..)
 Btw what are the issues that remain unsolved on this board? (I know, I know, I
have to check the wiki..). What is the priority for this board?
  Florentin

Quoting Richard Smith <smithbone at gmail.com>:

> echelon at free.fr wrote:
>
> >  Carl-Daniel, I didn't say our datasheetd differ.. What I have said is that
> I
> > did physical measurements on my motherboard and what I have measured didn't
> > match at all the pin-out into the datasheet!! (see my previous posts..)
> >  Maybe this is only a minor hardware issue and it doesn't impact the
> software at
> > all, but I prefered to signal it as an odd thing!..
> >  Maybe someone with a v2.0 revision of m57sli could confirm my statements..
> >
>
> Wow.  I'm glad I found this thread.  It helped me keep my sanity.
>
> My M57SLI-S4 V2.0 board(s) arrived Friday and I spent most of today
> studying the laout of the I want to install LinuxBIOS on.  I was hoping
> to figure out how to enable the 2nd SPI chip that they have pads for.
>
> I've verified what Florentin sees is true. The physical pinout of the
> IT8716F on the board does NOT match the public datasheet.  I've also
> made a discovery.  The die inside the part is rotated.  So the relative
> pinout _is_ the same only shifted.
>
> Take the pinout of the datasheet and do a +31 on the pin numbers
> wrapping at pins that are > 128.  So Pin 1 of the datasheet is actually
> pin 32 on the board.  Then it all lines up nicely.
>
> The key was the floppy signals. I noticed that the relative order
> matched the datasheet but only in the wrong location.  So then I started
> checking pins next to the floppy signals and it all began to make sense.
>
> But I still don't yet know how to make the 2nd SPI part go using the
> signals routed on the board.
>
> CS# from the IT8716F is routed up to R509 which is a zero ohm resistor.
>   If this resistor is in place then CS is hardwired to CS# on U5 which
> is the SPI chip that's loaded.  If you pull R509 then the CS# to both
> chips are free to be selected by (unloaded) Q2,Q43,Q4, and Q5 +
> resistors but I don't have the configuration mapped out.
>
> It does not look like there is any easy way to re-enable switching
> between the SPI chips since you have to load several missing parts.
>
> I'll probably just end up soldering on a 2nd chip and then wiring the
> CS# pins up to a switch like the other mods did.
>
> --
> Richard A. Smith
> smithbone at gmail.com
>
>






More information about the coreboot mailing list