[LinuxBIOS] [PATCH] flashrom: fix page size definitions for new SPI chips
Carl-Daniel Hailfinger
c-d.hailfinger.devel.2006 at gmx.net
Tue Dec 18 00:57:58 CET 2007
All SPI chips mentioned in flashchips.c had their sector size listed as
page size. Fix that. Page size is uniform 256 bytes for SPI.
A sector/block size field in struct flashchip would be nice, though.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Index: flashrom-fixedpagesizes/flashchips.c
===================================================================
--- flashrom-fixedpagesizes/flashchips.c (Revision 3012)
+++ flashrom-fixedpagesizes/flashchips.c (Arbeitskopie)
@@ -46,7 +46,7 @@
probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt},
{"MX29F002", MX_ID, MX_29F002, 256, 64 * 1024,
probe_29f002, erase_29f002, write_29f002},
- {"MX25L4005", MX_ID, MX_25L4005, 512, 4 * 1024,
+ {"MX25L4005", MX_ID, MX_25L4005, 512, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
{"SST29EE020A", SST_ID, SST_29EE020A, 256, 128,
probe_jedec, erase_chip_jedec, write_jedec},
@@ -140,23 +140,23 @@
probe_jedec, erase_chip_jedec, write_jedec},
{"M29F040B", ST_ID, ST_M29F040B, 512, 64 * 1024,
probe_29f040b, erase_29f040b, write_29f040b},
- {"M25P05-A", ST_ID, ST_M25P05A, 64, 32 * 1024,
+ {"M25P05-A", ST_ID, ST_M25P05A, 64, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P10-A", ST_ID, ST_M25P10A, 128, 32 * 1024,
+ {"M25P10-A", ST_ID, ST_M25P10A, 128, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P20", ST_ID, ST_M25P20, 256, 64 * 1024,
+ {"M25P20", ST_ID, ST_M25P20, 256, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P40", ST_ID, ST_M25P40, 512, 64 * 1024,
+ {"M25P40", ST_ID, ST_M25P40, 512, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P80", ST_ID, ST_M25P80, 1024, 64 * 1024,
+ {"M25P80", ST_ID, ST_M25P80, 1024, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P16", ST_ID, ST_M25P16, 2048, 64 * 1024,
+ {"M25P16", ST_ID, ST_M25P16, 2048, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P32", ST_ID, ST_M25P32, 4096, 64 * 1024,
+ {"M25P32", ST_ID, ST_M25P32, 4096, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P64", ST_ID, ST_M25P64, 8192, 64 * 1024,
+ {"M25P64", ST_ID, ST_M25P64, 8192, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
- {"M25P128", ST_ID, ST_M25P128, 16384, 256 * 1024,
+ {"M25P128", ST_ID, ST_M25P128, 16384, 256,
probe_spi, generic_spi_chip_erase_c7, generic_spi_chip_write},
{"82802ab", 137, 173, 512, 64 * 1024,
probe_82802ab, erase_82802ab, write_82802ab},
More information about the coreboot
mailing list