[LinuxBIOS] another question for cs5536
marc.jones at amd.com
Thu Jul 5 18:05:44 CEST 2007
Peter Stuge wrote:
> On Thu, Jul 05, 2007 at 10:34:53PM +0800, Songmao Tian wrote:
>> with regard to interrupt signal, I am still puzzled with the
>> PCI_INTA#, it is said that it's a input io. Shouldn't it output
>> the interrupt signal to cpu?
> I suspect it is the signal facing PCI devices.
> The signal facing the CPU is probably inside the GeodeLink somewhere.
Peter is correct. The PCI_INTA# from the CPU(northbridge) to the cs5536
is for graphics and/or AES egine interrupts. The interrupt signal(INTR#)
from the cs5536 to the CPU is in the sideband serial packet. Look for
"CPU Interface Serial (CIS)" in the 5536 databook for more information.
Senior Software Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com
More information about the coreboot