[LinuxBIOS] mcp55 flashrom problem

Stefan Reinauer stepan at coresystems.de
Sat Mar 3 19:04:42 CET 2007


* Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net> [070302 20:57]:
> > Datapoint 1:
> > 
> > Last Wednesday, we got fairly large differences in the flashrom readouts
> > between boots, on the order of about 100 bytes, spread throughout the image.
> 
> Looks like shadowing is on.
 
I disagree. The shadowed copy is uncompressed, the shadow-off copy is
compressed. Those two copies definitely have more than 100 bytes
difference.

> > Datapoint 2:
> > 
> > The downloadable bios from Gigabyte must be somehow compressed (even though
> > it's the exact right size), and be decompressed by their proprietary flash
> > tool on the fly; it's *totally* different from what flashrom reads.
 
> Looks like you read an uncompressed version of the BIOS with flashrom.
> -> Shadowing is on.
 
Looks like Gigabyte encrypts their BIOS images?

All BIOS images are compressed in flash nowadays. LinuxBIOS is not
particularly innovative here.

> > +++ test7.rom.hd  2007-03-02 13:49:23.000000000 -0500
> > @@ -360,7 +360,7 @@
> > -0000fd90  0f 00 24 00 12 00 00 02  03 07 00 00 40 00 00 00 |..$......... at ...|
> > +0000fd90  20 00 2d 00 12 00 00 02  03 07 00 00 40 00 00 00 | .-......... at ...|
> > 
> > As you can see, a 2 bytes difference.
> > 
> > That's good news I think, it means that flashrom is probably doing the same
> > thing as Q-flash.
> 
> Yes, both programs don't disable shadowing.
> 
> > Rebooting (warm, cold, or even with unplugging of power for 10 seconds) only
> > leads to 2 bytes of difference now between boots. For instance:
 
Did it say something like "Updating ESCD..." during boot?

> > What really confuses me though is that there are changes *at all*. I thought
> > that it was non-trivial to write (small) changes to ROM chips (the thing
> > about block writes), 

You would read a whole block (ie 256 bytes) and write it again, with 2
bytes changed. Nothing too complex.

> and that the number of writes before the chip fails is
> > fairly limited. Is this ROM chip really being reprogrammed every single time
> > the machine boots?

I would assume so. Current chips have an average of far more than 10000
cycles before failure. With 365 days a year, your machine will fail
after 27 years if you reboot it every day. (Potentially not every reboot
will change the flashrom) Or, if you would assume an average use time of
3 years for the system, 10 reboots every day. This is plenty.

Good question is what changed between the boots that made the bios
rewrite parts of the flash. 

Stefan

-- 
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
      Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info at coresystems.dehttp://www.coresystems.de/




More information about the coreboot mailing list