[LinuxBIOS] PhyWrite [SPI flash-chips]
stuge-linuxbios at cdy.org
Wed Mar 14 06:29:39 CET 2007
On Tue, Mar 13, 2007 at 11:37:10PM +0800, Anton wrote:
> How to physically route signals is clear. Programming chip - my
> Board is ICH7-based, flashrom doesn't detect chip (SST25LF080A).
> I'm stuck here...
ICH7 has SPI master for the flash.
There are functional straps for selecting whether to boot from SPI,
PCI or LPC, it can also be controlled by bits 11:10 in register 3410.
(I guess to boot from another source after a reset.)
That could be used to boot from SPI with factory BIOS first, to a
simple program that resets the registers to boot from LPC or PCI,
puts LinuxBIOS in place, and does a reset.
The PCI option is interesting.
--8<-- page 289
Boot BIOS Straps (BBS): This field determines the destination of
accesses to the BIOS memory range. The default values for these bits
represent the strap values of GNT5#/GPIO17 (bit 11) and GNT4#/GPIO48
(bit 10) (active-high logic levels) at the rising edge of PWROK.
When PCI is selected, the top 16 MB of memory below 4 GB is accepted
by the primary side of the PCI-to-PCI bridge and forwarded to the PCI
bus. This allows systems with corrupted or unprogrammed flash to boot
from a PCI device. The PCI-to-PCI bridge Memory Space Enable bit does
not need to be set (nor any other bits) for these cycles to go to
PCI. Note that BIOS decode range bits and the other BIOS protection
bits have no effect when PCI is selected.
When SPI or LPC is selected, the range that is decoded is further
qualified by other configuration bits described in the respective
The value in this field can be overwritten by software as long as the
BIOS Interface Lock-Down (bit 0) is not set.
There are several things to explore especially if you're handy with
the soldering iron. If not you could investigate the LPC boot option
and simply pressing a PLCC flash chip against the pads where it could
be soldered. (Or am I confusing your board with another now?)
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