[LinuxBIOS] filo ide speedup patch?

[Peter Stuge]

On Sun, Mar 18, 2007 at 06:36:44PM +0100, Stefan Reinauer wrote:
> > Find attached a patch for timer2 and hard reset. I'm looking at
> > FILO right now.
> 
> The below patch works fine on my system, but some older versions of
> the C3 lack support for the rdtsc command. (Nehemiah has it)
> 
> Whereas the Centaur/Wincore is said to not have rdtsc.

Aha!


> I would assume the patch is wrong for the epia and right for the
> epia-m.
> 
> Do you mind dropping the epia part?

Not at all, we should have working defaults, but I'll add a note to
the wiki for people to enable it if they have Nehemiah.

Can CONFIG_UDELAY_TSC=1 in targets/via/epia/Config.lb also
automatically set CONFIG_UDELAY_IO=0 ?


//Peter
-------------- next part --------------
Changes by Richard Smith and me from the LinuxBIOS symposium 2006.

Without CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 1 million outb():s are used for timer calibration and that takes over one second.
EPIA-M boards have the x86 timer2 so let's use it and make boot faster.
Since only some EPIA boards have the Nehemiah CPU default to IO based but add the options so user can change it on Config.lb.

src/mainboard/via/epia*/reset.c is dead code so HARD_RESET should be 0. (entire file within #if 0)

Signed-off-by: Peter Stuge <peter at stuge.se>
Index: src/mainboard/via/epia-m/Options.lb
===================================================================
--- src/mainboard/via/epia-m/Options.lb	(revision 2570)
+++ src/mainboard/via/epia-m/Options.lb	(working copy)
@@ -38,6 +38,7 @@
 uses MAXIMUM_CONSOLE_LOGLEVEL
 uses CONFIG_CONSOLE_SERIAL8250
 uses CONFIG_UDELAY_TSC
+uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
 uses CONFIG_PCI_ROM_RUN
 uses CONFIG_CONSOLE_VGA
 uses CONFIG_MAX_PCI_BUSES 
@@ -66,11 +67,12 @@
 ## Use TSC for udelay.
 ##
 default CONFIG_UDELAY_TSC=1
+default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
 
 ##
 ## Build code to reset the motherboard from linuxBIOS
 ##
-default HAVE_HARD_RESET=1
+default HAVE_HARD_RESET=0
 
 ##
 ## Build code to export a programmable irq routing table
Index: src/mainboard/via/epia/Options.lb
===================================================================
--- src/mainboard/via/epia/Options.lb	(revision 2570)
+++ src/mainboard/via/epia/Options.lb	(working copy)
@@ -11,6 +11,8 @@
 uses HAVE_FALLBACK_BOOT
 uses HAVE_HARD_RESET
 uses CONFIG_UDELAY_IO
+uses CONFIG_UDELAY_TSC
+uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
 uses HAVE_OPTION_TABLE
 uses USE_OPTION_TABLE
 uses CONFIG_ROM_PAYLOAD
@@ -81,12 +83,15 @@
 ##
 ## Build code to reset the motherboard from linuxBIOS
 ##
-default HAVE_HARD_RESET=1
+default HAVE_HARD_RESET=0
 
 ##
-## use io based udelay function
+## use ui based udelay function
+## change to TSC if you have a Nehemiah CPU
 ##
 default CONFIG_UDELAY_IO=1
+default CONFIG_UDELAY_TSC=0
+default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0
 
 ##
 ## Build code to export a programmable irq routing table