[LinuxBIOS] GA-M57SLI-S4 dual bios pins was Re: New with a GA-M57SLI-S4

ST st at iss.tu-darmstadt.de
Wed Mar 28 00:36:19 CEST 2007


Hi Jose

Well, one of my harddisk started acting strange so i had to open my case...

Well the result in pretty raw format right now.
Bios Chip is a:
PMC
0621
Pm49FLOO4T-33JCE
If someone can enlighten me or has pointers to a datasheet, that would be 
nice.

I counted the pins the totally wrong way by starting clockwise at the 
flattened corner of the chip. It has 32 Pins. The open Solder Pins where 
counted in the same way. 

Bios Pins	connected to
back
1		1,2
2		2,1
3		3
4		?
5		5
6		6
7		7,WP_BIOS_2,T13

top 
8		8
9		9,WP_BIOS_2,T13
10		?
11		?
12		12,WP_BIOS_2,T13
13		Interesting see Note below!
14		14,BT_PCI_2
15		?
16		?
front
17		?
18		?
19		19,WP_BIOS_2,T13
20		20
21		21,WP_BIOS_2,T13
22		22
23		23
bottom
24		24
25		?
26		?
27		?
28		?
29		29
30		30,WP_BIOS_1
31		31,WP_BIOS_2,T13
32		32,WP_BIOS_2,T13

WP_BIOS Pins are very probably not soldered three headed jumper pin 
where "white" marked pin is 1 (the one torwards the back). I think it means 
"Write Protect".

T1 and T2 are two connectors (of a total of four) that consist of three solder 
points right in front of the PCIe*1 link connectors. The last number is the 
pin number also counted from the back. 

I found that T22 is connected to the bios pin 13 and T12 is connected to the 
unsoldered pin 13. This is the only difference if found in the connection of 
the bios and unsoldered pins. I think pin 13 is the CE (Chip Enable) of this 
bios chip?

T13,T23 and WP_BIOS_2 are connected.

So Jose if you like you can try to figure out where these question marks are 
connected to.
> If they are directly connected it's true that maybe a software switch
> make the selection of which bios take the control at start up, I am
> not a low level man (a bit a bit), but without specifications and as
> you say with the patents on hand will be hard to find how it is done.
I think the flash bios is connected to the multi io chip? Is this ITE labled 
chip an super io chip?
> Maybe dis assembling the code, but as I say, my low level knowledge is
> very low :D.
Disassembling is a pain in the ... . I think if we can find out the 
connections between these chips we are better of.

> As soon as I can i will put my hands on the multimeter or the
> oscilloscope and do something (the bricking is not on my plans, yet
Fine. I think the best way forward right now is to find the Datasheets, 
reorder the pin count and match the functions to my list above. After we have 
some knowledge about the involved chips, you can probably remeasure and 
verify our guesses?
> > I have taken already an look at the dualbios stuff from gigabyte. It
> > seems as both bios chips should contain the same bios (at least partly)
> > and some software logic determines which chip it activates for booting.
> > Well it's patented so there "should" be some information available but so
> > far i haven't found the corresponding patent filings (are they public or
> > only available with the ever involved "bling" when it comes these patents
> > ?).
So nobody has an idea how to obtain this stuff. This patent stuff is very 
awkward.
> > Then there has to be some logic which decides to boot from which chip.
If the bios failure should be detected this only works reliably with an 
watchdog which switches the bios on failure. 

ST




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