[LinuxBIOS] GA-M57SLI-S4 dual bios pins was Re: New with a GA-M57SLI-S4

Peter Stuge stuge-linuxbios at cdy.org
Wed Mar 28 03:31:31 CEST 2007

On Wed, Mar 28, 2007 at 12:36:19AM +0200, ST wrote:
> I counted the pins the totally wrong way by starting clockwise at
> the flattened corner of the chip. It has 32 Pins. The open Solder
> Pins where counted in the same way.

Chip pin = (37-yourpin) mod 32

I looked up the relevant pins in the data sheet:

> Bios Pins	connected to
> 3		3

2, RST#

> 5		5

32, Vcc

> 6		6

31, CLK

> 12		12,WP_BIOS_2,T13

25, Vcc, this does not make sense.

Vcc is the power to the chip. WP_BIOS_2 is GND. That would mean
there is a short circuit. Could you try switching the probes around
to rule out that there is a protection diode somewhere allowing
current one way but not the other?

> 13		Interesting see Note below!

24, INIT#, a second reset

> 14		14,BT_PCI_2


> 20		20

17, LAD3

> 21		21,WP_BIOS_2,T13

16, GND

> 22		22

15, LAD2

> 23		23

14, LAD1

> 24		24

13, LAD0

The board may already support real dual BIOS in hardware!

Seeing how the chips are wired, there may already be logic on board
to first try one chip then the other. It all depends on INIT#.

> 29		29
> 30		30,WP_BIOS_1

8, TBL# and 7, WP#

TBL is top boot block protection. WP is write protection for the
entire chip except the top boot block. The protection is active if
the pins are connected to GND. You found that GND was also WP_BIOS_2.
This means that the chip would be write protected if there was a
jumper shorting WP_BIOS_1 and WP_BIOS_2 together, which supports your
theory! :)

> I found that T22 is connected to the bios pin 13 and T12 is
> connected to the unsoldered pin 13. This is the only difference if
> found in the connection of the bios and unsoldered pins. I think
> pin 13 is the CE (Chip Enable) of this bios chip?

Pin 24 INIT# is probably used as a kind of chip enable signal, just
backwards; when INIT# is pulled low, the chip will be in reset and
act as if it wasn't there.

It would be interesting to know what signal is present on (empty)
pad 24 during boot, specifically if the signal ever goes high. You
could try to set the scope to trigger on a rising edge and see if
the scope triggers during a boot. Don't slip with the probe! :)

Also, what are T22 and T12?

Could you check if either of them is connected to any pin on the
superio? (But I doubt it.)

> T13,T23 and WP_BIOS_2 are connected.

GND again.

> So Jose if you like you can try to figure out where these question
> marks are connected to.

All pins/pads you marked with ? are either N/C (not connected) or RES
(reserverd) on the chip and can be ignored for booting purposes.

> > If they are directly connected it's true that maybe a software
> I think the flash bios is connected to the multi io chip? Is this
> ITE labled chip an super io chip?

The IT8716F is a super IO, yes.


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