[LinuxBIOS] r2976 - in trunk/LinuxBIOSv2/src: mainboard/gigabyte/ga_2761gxdk southbridge/sis/sis966
svn at openbios.org
svn at openbios.org
Tue Nov 20 15:11:25 CET 2007
Author: hailfinger
Date: 2007-11-20 15:11:24 +0100 (Tue, 20 Nov 2007)
New Revision: 2976
Modified:
trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/Config.lb
trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c
trunk/LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_smbus.c
Log:
1. Fix pirq routing table setting for GA-2761GXDK.
2. Southbridge PCIe slots are working correctly now.
3. Disable keyboard & mouse ports for GA-2761GXDK.
Signed-off-by: Morgan Tsai <my_tsai at sis.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Modified: trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/Config.lb
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/Config.lb 2007-11-17 17:13:52 UTC (rev 2975)
+++ trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/Config.lb 2007-11-20 14:11:24 UTC (rev 2976)
@@ -269,12 +269,12 @@
io 0x62 = 0x230
irq 0x70 = 9
end
- device pnp 2e.5 on # Keyboard
+ device pnp 2e.5 off # Keyboard
io 0x60 = 0x60
io 0x62 = 0x64
irq 0x70 = 1
end
- device pnp 2e.6 on # Mouse
+ device pnp 2e.6 off # Mouse
irq 0x70 = 12
end
device pnp 2e.8 off # MIDI
Modified: trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c
===================================================================
--- trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c 2007-11-17 17:13:52 UTC (rev 2975)
+++ trunk/LinuxBIOSv2/src/mainboard/gigabyte/ga_2761gxdk/irq_tables.c 2007-11-20 14:11:24 UTC (rev 2976)
@@ -75,7 +75,7 @@
addr &= ~15;
/* This table must be betweeen 0xf0000 & 0x100000 */
- printk_info("Writing IRQ routing tables to 0x%x...\n", addr);
+ printk_info("Writing IRQ routing tables to 0x%x...", addr);
pirq = (void *)(addr);
v = (uint8_t *)(addr);
@@ -83,8 +83,8 @@
pirq->signature = PIRQ_SIGNATURE;
pirq->version = PIRQ_VERSION;
- pirq->rtr_bus = bus_sis966[0];
- pirq->rtr_devfn = ((sbdn+6)<<3)|0;
+ pirq->rtr_bus = 0;
+ pirq->rtr_devfn = PCI_DEVFN(2, 0);
pirq->exclusive_irqs = 0;
@@ -98,81 +98,73 @@
pirq_info = (void *) ( &pirq->checksum + 1);
slot_num = 0;
+ write_pirq_info(pirq_info, 0, PCI_DEVFN(2, 0), 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
+ pirq_info++; slot_num++;
+
+ pirq->size = 32 + 16 * slot_num;
+
+ for (i = 0; i < pirq->size; i++)
+ sum += v[i];
+
+ sum = pirq->checksum - sum;
+
+ if (sum != pirq->checksum) {
+ pirq->checksum = sum;
+ }
+
+ printk_info("done.\n");
+
{
device_t dev;
dev = dev_find_slot(0, PCI_DEVFN(2,0));
- if (dev) {
-
+ if (dev) {
/* initialize PCI interupts - these assignments depend
on the PCB routing of PINTA-D
PINTA = IRQ10
PINTB = IRQ11
- PINTC = IRQ5
- PINTD = IRQ5
+ PINTC = NA
+ PINTD = IRQ10
PINTE = IRQ11
PINTF = IRQ5
- PINTG = IRQ10
- PINTH = IRQ5
+ PINTG = NA
+ PINTH = IRQ7
*/
int i;
uint8_t reg[8]={0x41,0x42,0x43,0x44,0x60,0x61,0x62,0x63};
- uint8_t irq[8]={0x0A,0X0B,0X05,0X05,0X0B,0X05,0X0A,0X0A};
+ uint8_t irq[8]={0x0A,0X0B,0X0,0X0a,0X0B,0X05,0X0,0X07};
for(i=0;i<8;i++)
pci_write_config8(dev, reg[i], irq[i]);
- }
+ } // endif
printk_debug("Setting Onboard SiS Southbridge\n");
- /*
- * Non-layout for GA-2761GX
- *
dev = dev_find_slot(0, PCI_DEVFN(2,5)); // 5513 (IDE)
pci_write_config8(dev, 0x3C, 0x0A);
- */
-
dev = dev_find_slot(0, PCI_DEVFN(3,0)); // USB 1.1
pci_write_config8(dev, 0x3C, 0x0B);
dev = dev_find_slot(0, PCI_DEVFN(3,1)); // USB 1.1
pci_write_config8(dev, 0x3C, 0x05);
dev = dev_find_slot(0, PCI_DEVFN(3,3)); // USB 2.0
- pci_write_config8(dev, 0x3C, 0x0A);
+ pci_write_config8(dev, 0x3C, 0x07);
dev = dev_find_slot(0, PCI_DEVFN(4,0)); // 191 (LAN)
- pci_write_config8(dev, 0x3C, 0x05);
+ pci_write_config8(dev, 0x3C, 0x0A);
dev = dev_find_slot(0, PCI_DEVFN(5,0)); // 1183 (SATA)
pci_write_config8(dev, 0x3C, 0x0B);
dev = dev_find_slot(0, PCI_DEVFN(6,0)); // PCI-E
pci_write_config8(dev, 0x3C, 0x0A);
dev = dev_find_slot(0, PCI_DEVFN(7,0)); // PCI-E
pci_write_config8(dev, 0x3C, 0x0A);
-
- /*
- * Non-layout for GA-2761GX
- *
dev = dev_find_slot(0, PCI_DEVFN(15,0)); // Azalia
pci_write_config8(dev, 0x3C, 0x05);
- */
}
-//pci bridge
- write_pirq_info(pirq_info, bus_sis966[0], ((sbdn+6)<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
- pirq_info++; slot_num++;
+ printk_debug("pirq routing table, size=%d\n", pirq->size);
+ for (i = 0; i < pirq->size; i+=4)
+ printk_debug("%.2x%.2x%.2x%.2x\n", v[i+3],v[i+2],v[i+1],v[i]);
- pirq->size = 32 + 16 * slot_num;
-
- for (i = 0; i < pirq->size; i++)
- sum += v[i];
-
- sum = pirq->checksum - sum;
-
- if (sum != pirq->checksum) {
- pirq->checksum = sum;
- }
-
- printk_info("done.\n");
-
return (unsigned long) pirq_info;
}
Modified: trunk/LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_smbus.c
===================================================================
--- trunk/LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_smbus.c 2007-11-17 17:13:52 UTC (rev 2975)
+++ trunk/LinuxBIOSv2/src/southbridge/sis/sis966/sis966_early_smbus.c 2007-11-20 14:11:24 UTC (rev 2976)
@@ -151,7 +151,7 @@
{0x45, 0x00 ,0xFF}, //Reg 0x45
{0x46, 0x00 ,0x90}, //Reg 0x46
{0x47, 0x00 ,0xA0}, //Reg 0x47
-//{0x4C, 0xFF ,0x09}, //Reg 0x4C // SiS307 enable
+//{0x4C, 0xFF ,0x09}, //Reg 0x4C // SiS307 enable
{0x4E, 0x00 ,0x00}, //Reg 0x4E
{0x4F, 0x00 ,0x02}, //Reg 0x4F
{0x5B, 0x00 ,0x44}, //Reg 0x5B
@@ -195,7 +195,7 @@
};
static const uint8_t SiS_NBAGP_init[34][3]={
-{0xCF, 0xDF, 0x00}, //HT issue
+{0xCF, 0xDF, 0x00}, //HT issue
{0x06, 0xDF, 0x20},
{0x1E, 0xDF, 0x20},
{0x50, 0x00, 0x02},
@@ -228,7 +228,7 @@
{0xBF, 0xF9, 0x06},
{0xBA, 0x00, 0x61},
{0xBD, 0x7F, 0x80},
-{0x00, 0x00, 0x00} //End of table
+{0x00, 0x00, 0x00} //End of table
};
static const uint8_t SiS_ACPI_2_init[56][3]={
@@ -298,7 +298,7 @@
{0x2E, 0x00, 0x83},
{0x2F, 0x00, 0x11},
{0x90, 0x00, 0x40},
-{0x91, 0x00, 0x00}, // set mode
+{0x91, 0x00, 0x00}, // set mode
{0x50, 0x00, 0xA2},
{0x52, 0x00, 0xA2},
{0x55, 0x00, 0x96},
@@ -313,7 +313,7 @@
{0x85, 0x00, 0xB3},
{0x86, 0x00, 0x72},
{0x87, 0x00, 0x40},
-{0x88, 0x00, 0xDE}, // after set mode
+{0x88, 0x00, 0xDE}, // after set mode
{0x89, 0x00, 0xB3},
{0x8A, 0x00, 0x72},
{0x8B, 0x00, 0x40},
@@ -334,7 +334,7 @@
{0xA1, 0x00, 0x15},
{0xA2, 0x00, 0x15},
{0xA3, 0x00, 0x15},
-{0x00, 0x00, 0x00} //End of table
+{0x00, 0x00, 0x00} //End of table
};
/* In => Share Memory size
@@ -411,7 +411,7 @@
i++;
};
// ========================== NBPCIE =============================
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761), 0); //Disable Internal GUI enable bit
+ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761), 0); //Disable Internal GUI enable bit
temp8 = pci_read_config8(dev, 0x4C);
GUI_En = temp8 & 0x10;
pci_write_config8(dev, 0x4C, temp8 & (!0x10));
@@ -425,19 +425,19 @@
pci_write_config8(dev, SiS_NBPCIE_init[i][0], temp8);
i++;
};
- dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761), 0); //Restore Internal GUI enable bit
+ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS761), 0); //Restore Internal GUI enable bit
temp8 = pci_read_config8(dev, 0x4C);
pci_write_config8(dev, 0x4C, temp8 | GUI_En);
- return;
+ return;
}
void sis_init_stage2(void)
{
- device_t dev;
- msr_t msr;
+ device_t dev;
+ msr_t msr;
int i;
uint8_t temp8;
uint16_t temp16;
@@ -509,19 +509,36 @@
// ========================== Misc =============================
printk_debug("Init Misc -------->\n");
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_LPC), 0);
- // PCI Device Enable
- pci_write_config8(dev, 0x7C, 0x03); // bit0=0 : enable audio controller(), bit1=1 : disable modem
- pci_write_config8(dev, 0x76, pci_read_config8(dev, 0x76)|0x30); // SM bus enable, PCIEXP Controller 1 and 2 disable
+
+ /* R77h Internal PCI Device Enable 1 (Power On Value = 0h)
+ * bit5 : USB Emulation (1=enable)
+ * bit3 : Internal Keyboard Controller Port Access Control enable (1=enable)
+ * bit2 : Reserved
+ * bit1 : Mask USB A20M# Event (1:K8, 0:P4/K7)
+ */
+ pci_write_config8(dev, 0x77, 0x2E);
+
+ /* R7Ch Internal PCI Device Enable 2 (Power On Value = 0h)
+ * bit4 : SATA Controller Enable (0=enable)
+ * bit3 : IDE Controller Enable (0=enable)
+ * bit2 : MAC Controller Enable (0=enable)
+ * bit1 : MODEM Controller Enable (1=disable)
+ * bit0 : AC97 Controller Enable (1=disable)
+ */
+ pci_write_config8(dev, 0x7C, 0x03);
+
+ /* R7Eh Enable Azalia (Power On Value = 08h)
+ * bit3 : Azalia Controller Enable (0=enable)
+ */
pci_write_config8(dev, 0x7E, 0x00); // azalia controller enable
-
temp8=inb(0x878)|0x4; //bit2=1 enable Azalia =0 enable AC97
outb(temp8, 0x878); // ACPI select AC97 or HDA controller
printk_debug("Audio select %x\n",inb(0x878));
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_SIS, PCI_DEVICE_ID_SIS_SIS966_SATA), 0);
- if(!dev){
+
+ if (!dev)
print_debug("SiS 1183 does not exist !!");
- }
// SATA Set Mode
pci_write_config8(dev, 0x90, (pci_read_config8(dev, 0x90)&0x3F) | 0x40);
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