[LinuxBIOS] [PATCH] small fix for iei/juki-511p

Uwe Hermann uwe at hermann-uwe.de
Tue Nov 20 17:07:51 CET 2007


On Tue, Nov 20, 2007 at 06:21:54PM +0500, Nikolay Petukhov wrote:
> This patch include support for VGA. Also it change PIR-table for
> support add-on PCI cards.
> 
> Signed-off-by: Nikolay Petukhov <nikolay.petukhov at gmail.com>


> diff -Nru LinuxBIOSv2-2975/src/mainboard/iei/juki-511p/irq_tables.c LinuxBIOSv2-2975-juki/src/mainboard/iei/juki-511p/irq_tables.c
> --- LinuxBIOSv2-2975/src/mainboard/iei/juki-511p/irq_tables.c	2007-06-08 02:52:42.000000000 +0600
> +++ LinuxBIOSv2-2975-juki/src/mainboard/iei/juki-511p/irq_tables.c	2007-11-20 16:41:31.000000000 +0500
> @@ -19,56 +19,174 @@
>   */
>  
>  #include <arch/pirq_routing.h>
> +#include <console/console.h>
> +#include <device/pci.h>
>  
> -#define IRQ_BITMAP_LINK0 0x0800		/* chipset's INTA# input should be routed to IRQ11 */
> -#define IRQ_BITMAP_LINK1 0x0400		/* chipset's INTB# input should be routed to IRQ10 */
> -#define IRQ_BITMAP_LINK2 0x0000		/* chipset's INTC# input should be routed to nothing (disabled) */
> -#define IRQ_BITMAP_LINK3 0x0000		/* chipset's INTD# input should be routed to nothing (disabled) */
> +/* Platform IRQs */
> +#define PIRQA 11
> +#define PIRQB 9
> +#define PIRQC 12
> +#define PIRQD 10
> +
> +/* Map */
> +#define IRQ_BITMAP_LINK0 (1 << PIRQA)
> +#define IRQ_BITMAP_LINK1 (1 << PIRQB)
> +#define IRQ_BITMAP_LINK2 (1 << PIRQC)
> +#define IRQ_BITMAP_LINK3 (1 << PIRQD)
> +#define IRQ_BITMAP_NOLINK 0x0
> +
> +#define EXCLUSIVE_PCI_IRQS (IRQ_BITMAP_LINK0 | IRQ_BITMAP_LINK1 | IRQ_BITMAP_LINK2 | IRQ_BITMAP_LINK3)

Very nice! This is the most readable way to write this I've seen so far.

  
>  const struct irq_routing_table intel_irq_routing_table = {
>  	PIRQ_SIGNATURE,	 /* u32 signature */
>  	PIRQ_VERSION,	 /* u16 version */
> -	32+16*2,	 /* There can be a total of 2 devices on the bus */
> +	32+16*IRQ_SLOT_COUNT,	 /* There can be a total of IRQ_SLOT_COUNT devices on the bus */
>  	0x00,		 /* Where the interrupt router lies (bus) */
>  	(0x12<<3)|0x0,	 /* Where the interrupt router lies (dev) */
> -	0xc00,		 /* IRQs devoted exclusively to PCI usage */
> +	EXCLUSIVE_PCI_IRQS,		 /* IRQs devoted exclusively to PCI usage */
>  	0x1078,		 /* Vendor */
>  	0x2,		 /* Device */
>  	0,		 /* Crap (miniport) */
>  	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
> -	0x57,		 /* u8 checksum. This has to be set to some
> +	0x22,		 /* u8 checksum. This has to be set to some
>  			    value that would give 0 after the sum of all
>  			    bytes for this structure (including checksum) */
>  
>  	.slots = {
>  		[0] = {
> -			.slot = 0x0,	/* should be 0 when it is no real slot. My device is soldered */
> +			.slot = 0x0,	/* means also "on board" */
>  			.bus = 0x00,
> -			.devfn = (0x13<<3)|0x0,	/* 0x13 is my USB OHCI */
> +			.devfn = (0x13<<3)|0x0,	/* 0x13 is USB OHCI */
>  			.irq = {
>  				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
>  					.link = 0x01,			/* 0x01 means its connected to INTA# input at chipset */
>  					.bitmap = IRQ_BITMAP_LINK0
>  				},
>  				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
> +					.link = 0x0,			/* 0x0 means its not connected to at chipset */
> +					.bitmap = IRQ_BITMAP_NOLINK
> +				},
> +				[2] = {	/* <-- 2 means this is INTC# output from the device or slot */
> +					.link = 0x03,			/* 0x0 means its not connected to at chipset */
> +					.bitmap = IRQ_BITMAP_NOLINK
> +				},
> +				[3] = {	/* <-- 3 means this is INTD# output from the device or slot */
> +					.link = 0x04,			/* 0x0 means its not connected to at chipset */
> +					.bitmap = IRQ_BITMAP_NOLINK
> +				}
> +			}
> +		},
> +
> +		[1] = {
> +			.slot = 0x0,	/* means also "on board" */
> +			.bus = 0x00,
> +			.devfn = (0x0e<<3)|0x0,	/* 0x0e is Realtek Network device */
> +			.irq = {
> +				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
>  					.link = 0x02,			/* 0x02 means its connected to INTB# input at chipset */
>  					.bitmap = IRQ_BITMAP_LINK1
>  				},
> +				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
> +					.link = 0x0,			/* 0x0 means its not connected to at chipset */
> +					.bitmap = IRQ_BITMAP_NOLINK
> +				},
>  				[2] = {	/* <-- 2 means this is INTC# output from the device or slot */
> -					.link = 0x03,			/* 0x03 means its connected to INTC# input at chipset */
> +					.link = 0x0,			/* 0x0 means its not connected to at chipset */
> +					.bitmap = IRQ_BITMAP_NOLINK
> +				},
> +				[3] = {	/* <-- 3 means this is INTD# output from the device or slot */
> +					.link = 0x0,			/* 0x0 means its not connected to at chipset */
> +					.bitmap = IRQ_BITMAP_NOLINK
> +				}
> +			}
> +		},
> +
> +/* ################### backplane IP-6S ################### */
> +
> +/* PCISA IP-6S*/

Is this the "PCISA Bus Passive Backplane" I've found on the web?


> +
> +		[2] = {
> +			.slot = 0x1,	/* This is real slot. PCISA on IP-6S */
> +			.bus = 0x00,
> +			.devfn = (0x09<<3)|0x0,	/* 0x09 PCISA on IP-6S */
> +			.irq = {
> +				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
> +					.link = 0x02,			/* 0x02 means its connected to INTB# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK1
> +				},
> +				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
> +					.link = 0x04,			/* 0x04 means its connected to INTD# input at chipset */
>  					.bitmap = IRQ_BITMAP_LINK2
>  				},
> +				[2] = {	/* <-- 2 means this is INTC# output from the device or slot */
> +					.link = 0x03,			/* 0x03 means its connected to INTC# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK3
> +				},
>  				[3] = {	/* <-- 3 means this is INTD# output from the device or slot */
> +					.link = 0x01,			/* 0x01 means its connected to INTA# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK0
> +				}
> +			}
> +		},
> +
> +/* PCI2 IP-6S*/
> +
> +		[3] = {
> +			.slot = 0x2,	/* This is real PCI slot.  */
> +			.bus = 0x00,
> +			.devfn = (0x0a<<3)|0x0,	/* 0x0a PCI2 on IP-6S */
> +			.irq = {
> +				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
>  					.link = 0x04,			/* 0x04 means its connected to INTD# input at chipset */
>  					.bitmap = IRQ_BITMAP_LINK3
> +				},
> +				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
> +					.link = 0x01,			/* 0x01 means its connected to INTA# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK0
> +				},
> +				[2] = {	/* <-- 2 means this is INTC# output from the device or slot */
> +					.link = 0x02,			/* 0x02 means its connected to INTB# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK1
> +				},
> +				[3] = {	/* <-- 3 means this is INTD# output from the device or slot */
> +					.link = 0x03,			/* 0x03 means its connected to INTC# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK2
>  				}
>  			}
>  		},
>  
> -		[1] = {
> -			.slot = 0x0,	/* means also "on board" */
> +/* PCI3 IP-6S*/
> +
> +		[4] = {
> +			.slot = 0x3,	/* This is real PCI slot.  */
>  			.bus = 0x00,
> -			.devfn = (0x0e<<3)|0x0,	/* 0x0e is my Realtek Network device */
> +			.devfn = (0x0b<<3)|0x0,	/* 0x0b PCI3 on IP-6S */
> +			.irq = {
> +				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
> +					.link = 0x03,			/* 0x03 means its connected to INTC# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK2
> +				},
> +				[1] = {	/* <-- 1 means this is INTB# output from the device or slot */
> +					.link = 0x04,			/* 0x04 means its connected to INTD# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK3
> +				},
> +				[2] = {	/* <-- 2 means this is INTC# output from the device or slot */
> +					.link = 0x01,			/* 0x01 means its connected to INTA# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK0
> +				},
> +				[3] = {	/* <-- 3 means this is INTD# output from the device or slot */
> +					.link = 0x02,			/* 0x02 means its connected to INTB# input at chipset */
> +					.bitmap = IRQ_BITMAP_LINK1
> +				}
> +			}
> +		},
> +
> +/* PCI4 IP-6S*/
> +
> +		[5] = {
> +			.slot = 0x4,	/* This is real PCI slot.  */
> +			.bus = 0x00,
> +			.devfn = (0x0c<<3)|0x0,	/* 0x0c PCI4 on IP-6S */
>  			.irq = {
>  				[0] = {	/* <-- 0 means this is INTA# output from the device or slot */
>  					.link = 0x02,			/* 0x02 means its connected to INTB# input at chipset */
> @@ -87,7 +205,7 @@
>  					.bitmap = IRQ_BITMAP_LINK0
>  				}
>  			}
> -		}
> +		},
>  	}
>  };
>  
> @@ -99,5 +217,40 @@
>   */
>  unsigned long write_pirq_routing_table(unsigned long addr)
>  {
> -	return copy_pirq_routing_table(addr);
> +	int i, j, k, num_entries;
> +	unsigned char pirq[4];
> +	uint16_t chipset_irq_map;
> +	uint32_t pciAddr, pirtable_end;
> +	struct irq_routing_table *pirq_tbl;
> +	device_t pdev;
> +
> +	pirtable_end = copy_pirq_routing_table(addr);
> +
> +	/* Set up chipset IRQ steering. */
> +	pdev = dev_find_slot(0, (0x12 << 3));
> +	pci_write_config8(pdev, 0x5c, (PIRQB << 4 | PIRQA));
> +	pci_write_config8(pdev, 0x5d, (PIRQD << 4 | PIRQC));
> +
> +	pirq_tbl = (struct irq_routing_table *)(addr);
> +	num_entries = (pirq_tbl->size - 32) / 16;
> +
> +	/* Set PCI IRQs. */
> +	for (i = 0; i < num_entries; i++) {
> +		printk_debug("PIR Entry %d Dev/Fn: %X Slot: %d\n", i,
> +			     pirq_tbl->slots[i].devfn, pirq_tbl->slots[i].slot);
> +		for (j = 0; j < 4; j++) {
> +			printk_debug("INT: %c bitmap: %x ", 'A' + j,
> +				     pirq_tbl->slots[i].irq[j].bitmap);
> +			for (k = 0; (!((pirq_tbl->slots[i].irq[j].bitmap >> k) & 1)) && (pirq_tbl->slots[i].irq[j].bitmap != 0); k++) ;	/* Finds lsb in bitmap to IRQ#. */
> +			pirq[j] = k;
> +			printk_debug("PIRQ: %d\n", k);
> +		}
> +
> +		/* Bus, device, slots IRQs for {A,B,C,D}. */
> +		pci_assign_irqs(pirq_tbl->slots[i].bus,
> +				pirq_tbl->slots[i].devfn >> 3, pirq);
> +	}
> +
> +	/* Put the PIR table in memory and checksum. */
> +	return pirtable_end;

Hm, why is this required here? Is it necessary for all GX1/CS5530 boards? If so
it should be done in the CS5530 code, I think. Why doesn't the usual
copy_pirq_routing_table() suffice here?


>  }
> diff -Nru LinuxBIOSv2-2975/src/mainboard/iei/juki-511p/Options.lb LinuxBIOSv2-2975-juki/src/mainboard/iei/juki-511p/Options.lb
> --- LinuxBIOSv2-2975/src/mainboard/iei/juki-511p/Options.lb	2007-10-11 16:25:35.000000000 +0600
> +++ LinuxBIOSv2-2975-juki/src/mainboard/iei/juki-511p/Options.lb	2007-11-20 14:02:26.000000000 +0500
> @@ -42,7 +42,10 @@
>  uses TTYS0_BAUD
>  uses TTYS0_BASE
>  uses TTYS0_LCS
> +uses CONFIG_GX1_VIDEO
> +uses CONFIG_GX1_VIDEOMODE
>  uses CONFIG_VIDEO_MB
> +uses CONFIG_SPLASH_GRAPHIC
>  
>  ## ROM_SIZE is the size of boot ROM that this board will use.
>  default ROM_SIZE  = 256*1024
> @@ -71,7 +74,7 @@
>  ## Build code to export a programmable irq routing table
>  ##
>  default HAVE_PIRQ_TABLE=0
> -default IRQ_SLOT_COUNT=2
> +default IRQ_SLOT_COUNT=6
>  #object irq_tables.o
>  
>  ##
> @@ -140,7 +143,10 @@
>  default CC="$(CROSS_COMPILE)gcc -m32"
>  default HOSTCC="gcc"
>  
> -default CONFIG_VIDEO_MB = 0
> +default CONFIG_GX1_VIDEO = 1
> +default CONFIG_GX1_VIDEOMODE = 0
> +default CONFIG_VIDEO_MB = 2
> +default CONFIG_SPLASH_GRAPHIC = 1
>  
>  end
>  
> diff -Nru LinuxBIOSv2-2975/targets/iei/juki-511p/Config.lb LinuxBIOSv2-2975-juki/targets/iei/juki-511p/Config.lb
> --- LinuxBIOSv2-2975/targets/iei/juki-511p/Config.lb	2007-06-08 02:52:42.000000000 +0600
> +++ LinuxBIOSv2-2975-juki/targets/iei/juki-511p/Config.lb	2007-11-20 16:44:42.000000000 +0500
> @@ -28,6 +28,9 @@
>  option CONFIG_COMPRESS=0
>  option CONFIG_PRECOMPRESSED_PAYLOAD=0
>  
> +option DEFAULT_CONSOLE_LOGLEVEL=0
> +option MAXIMUM_CONSOLE_LOGLEVEL=0
> +
>  romimage "image"
>  	option ROM_IMAGE_SIZE=64*1024
>  	option LINUXBIOS_EXTRA_VERSION="-filo"


Looks good otherwise, will commit soon. Btw, does this code still work
fine for the ROCKY-512 as it seems to have done before?

Also, can you please create a status table in the wiki for this board?
See http://linuxbios.org/GIGABYTE_GA-2761GXDK_Build_Tutorial for
an example.


Thanks a lot, Uwe.
-- 
http://www.hermann-uwe.de  | http://www.holsham-traders.de
http://www.crazy-hacks.org | http://www.unmaintained-free-software.org




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