[LinuxBIOS] Gigabyte M61P-S3 board

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Fri Oct 5 18:11:48 CEST 2007

Hi Michael,

On 02.10.2007 02:21, Michael van der Kolff wrote:
> Uhm, just forgot to attach the additional patch I applied.  Here it comes :)
> On 10/2/07, Michael van der Kolff <mvanderkolff at gmail.com> wrote:
>> I just used r2816 with linuxbios_flashrom_ite_spi_restructured3.diff,
>> along with the attached patch (which just adds the different it8716 id
>> used on the GA-M61P-S3 board) and got the following output from
>> flashrom -V -m gigabyte:m61ps3
>> Calibrating delay loop... 793M loops per second. ok
>> No LinuxBIOS table found.
>> WARNING: No chipset found. Flash detection will most likely fail.
>> Found board "GIGABYTE GA-M61P-S3": Enabling flash write... Serial
>> flash segment 0xfffe0000-0xffffffff enabled
>> Serial flash segment 0x000e0000-0x000fffff enabled
>> Serial flash segment 0xffee0000-0xffefffff disabled
>> Serial flash segment 0xfff80000-0xfffeffff enabled
>> LPC write to serial flash enabled
>> serial flash pin 29
>> OK. [...]
>> Probing for MX25L4005, 512 KB
>> RDID returned c2 20 13
>> probe_spi: id1 0xc2, id2 0x2013
>> MX25L4005 found at physical address: 0xfff80000
>> Flash part is MX25L4005 (512 KB)
>> OK, only ENABLING flash write, but NOT FLASHING.

Can you resend the patch with a signed-off-by statement
and a changelog entry? My code is now in subversion, so you might want
to rediff your patch and check whether everything still works.

You can then include the following Acked-by in your mail:
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>


More information about the coreboot mailing list