[LinuxBIOS] Building an irq table - Help

joe at smittys.pointclark.net joe at smittys.pointclark.net
Fri Oct 19 03:42:55 CEST 2007


Quoting Marc Jones <marc.jones at amd.com>:

>
>
> joe at smittys.pointclark.net wrote:
>> Ok I am a little confused on how to tell what devices are what in   
>> irc_tablec.c
>> How do I tell?? Also where does the value for the "bitmap" come from?
>>
>> Thanks for your help - Joe
>>
>> /* bus,     dev|fn,
>> {0x01,(0x08<<3)|0x0,
>> {0x00,(0x1f<<3)|0x0,
>> {0x00,(0x1d<<3)|0x0,
>> {0x00,(0x00<<3)|0x0,
>> {0x00,(0x01<<3)|0x0,
>> {0x01,(0x00<<3)|0x0,
>> {0x01,(0x01<<3)|0x0,
>> {0x01,(0x02<<3)|0x0,
>> {0x01,(0x09<<3)|0x0,
>> {0x01,(0x06<<3)|0x0,
>> {0x01,(0x07<<3)|0x0,
>> {0x00,(0x02<<3)|0x0,
>>
>
> Joe,
> There is some good information here:
> http://linuxbios.org/index.php/Creating_Valid_IRQ_Tables
> http://www.microsoft.com/whdc/archive/pciirq.mspx
>
>
> Your bus/dv/fun should match the devices found when you do an lspci.
> The value for the bitmap is what IRQs are available on that INT#.
> Theses are typically 10 and/or 11 but could be any shareable IRQ.
>
> Marc
>
> 0xDDDDFFFF, LNK, 00, GSI
>
> DDDD is PCI DEV, FFFF is function, LNK is PCI link - so LNKA B etc...
> Next parameter is 00 if you do not support legacy PIC routing at all.
>
> Last parameter is global interrupt NR.
>
> Hope it helps,
>
> Rudolf


Thanks for your help Marc and Rudolf. I have been looking through most  
of the other irq_tables.c from different mainboards and it seems like  
on most of them the "fn" is 0x0 (like above). Is this a bug in  
getpir?? So do I need to manually change these to the correct functions?

I understand where the "link" comes from. These are set in the LPC  
Bridge registers, but where does the value for the "bitmap" come from?  
Mine eithor say 0xded8 or 0x0000?? The 0x0000 means it is not routed  
right? But I don't get where the 0xded8 comes from?

I just attached my irq_tables.c created from getpir so you can see  
what I mean.

Thanks - Joe
-------------- next part --------------
/* This file was generated by getpir.c, do not modify! 
   (but if you do, please run checkpir on it to verify)
   Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up

   Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM
*/

#include <arch/pirq_routing.h>

const struct irq_routing_table intel_irq_routing_table = {
	PIRQ_SIGNATURE,  /* u32 signature */
	PIRQ_VERSION,    /* u16 version   */
	32+16*7,	 /* there can be total 7 devices on the bus */
	0x00,		 /* Where the interrupt router lies (bus) */
	(0x1f<<3)|0x0,   /* Where the interrupt router lies (dev) */
	0xdef8,		 /* IRQs devoted exclusively to PCI usage */
	0x8086,		 /* Vendor */
	0x24c0,		 /* Device */
	0,		 /* Crap (miniport) */
	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
	0xcd,         /*  u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
	{
		/* bus,     dev|fn,   {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap},  slot, rfu */
		{0x00,(0x02<<3)|0x0, {{0x60, 0xded8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
		{0x00,(0x1d<<3)|0x0, {{0x60, 0xded8}, {0x63, 0xded8}, {0x62, 0xded8}, {0x6b, 0x0ded8}}, 0x0, 0x0},
		{0x00,(0x1f<<3)|0x0, {{0x62, 0xded8}, {0x61, 0xded8}, {0x6b, 0xded8}, {0x63, 0x0ded8}}, 0x0, 0x0},
		{0x01,(0x08<<3)|0x0, {{0x68, 0x0020}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x00000}}, 0x0, 0x0},
		{0x01,(0x00<<3)|0x0, {{0x60, 0xded8}, {0x61, 0xded8}, {0x62, 0xded8}, {0x63, 0x0ded8}}, 0x1, 0x0},
		{0x01,(0x01<<3)|0x0, {{0x63, 0xded8}, {0x60, 0xded8}, {0x61, 0xded8}, {0x62, 0x0ded8}}, 0x2, 0x0},
		{0x01,(0x02<<3)|0x0, {{0x62, 0xded8}, {0x63, 0xded8}, {0x60, 0xded8}, {0x61, 0x0ded8}}, 0x3, 0x0},
	}
};


More information about the coreboot mailing list