[LinuxBIOS] PATCH: add the pcengines ALIX1
marc.jones at amd.com
Mon Sep 10 19:36:54 CEST 2007
ron minnich wrote:
> Partial diff attached, .... here are comments.
> Still builds.
> On 9/8/07, Uwe Hermann <uwe at hermann-uwe.de> wrote:
>> Add a license header, please.
>>> +#define POST_CODE(x) outb(x, 0x80)
>> We have a global implementation already.
> cache as ram is weird, I want to test this before I use the library.
> The library can do lots more than outb, what with serial post and
> timers etc.
I think we discussed this when the LX CAR code went in. I don't recall
the exact problem but I don't think that you can use the library
function at this point.
>> Is this board-specific or chipset-specific? If the latter, it should not
>> be here.
> I am not sure. Marc?
I think that this was for:
/* Setup access to the MC for under 1MB. Note MC not setup yet. */
Yes, I think that routing to 1MB should be generic. I think you still
need the MSR function at that point for platform specific settings.
Senior Firmware Engineer
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mailto:Marc.Jones at amd.com
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