[LinuxBIOS] badly initialized (?) pci bridge on the M57SLI (with irq table and mptable)

[Peter Stuge]

On Sun, Sep 16, 2007 at 08:47:27PM -0400, Ward Vandewege wrote:
> Here's an lspci of the pci bridge (device 06.0), booted from the
> proprietary bios:
..
> and from linuxbios:

--- pcib.f      2007-09-17 18:21:34.000000000 +0200
+++ pcib.lb     2007-09-17 18:21:53.000000000 +0200
@@ -1,15 +1,15 @@
-0000:00:06.0 0604: 10de:0370 (rev a2) (prog-if 01)
-  Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
+0000:00:06.0 0604: 10de:0370 (rev a2) 
+  Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
   Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
   Latency: 0
-  Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
+  Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 
   I/O behind bridge: 0000f000-00000fff
-  Memory behind bridge: fb000000-fb0fffff
+  Memory behind bridge: fff00000-000fffff
   Prefetchable memory behind bridge: fff00000-000fffff
-  BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
+  BridgeCtl: Parity+ SERR+ NoISA- VGA- MAbort- >Reset- FastB2B-
   Capabilities: [b8] #0d [0000]
   Capabilities: [8c] #08 [a800]
-00: de 10 70 03 07 00 b0 00 a2 01 04 06 00 00 81 00
-10: 00 00 00 00 00 00 00 00 00 01 01 20 f0 00 80 02
-20: 00 fb 00 fb f0 ff 00 00 00 00 00 00 00 00 00 00
-30: 00 00 00 00 b8 00 00 00 00 00 00 00 00 00 00 0a
+00: de 10 70 03 04 01 b0 00 a2 00 04 06 00 00 81 00
+10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 80 02
+20: f0 ff 00 00 f0 ff 00 00 00 00 00 00 00 00 00 00
+30: 00 00 00 00 b8 00 00 00 00 00 00 00 00 00 03 0a


What determines the LB value for those polarity bits?


//Peter