[coreboot] [PATCH] Halt TCO timer on Intel 3100 chipset

Jeremy Jackson jerj at coplanar.net
Wed Apr 16 14:59:32 CEST 2008


On Tue, 2008-04-08 at 01:13 +0200, Peter Stuge wrote:
> True, but it's not very easy to regularly poke the timer without an
> interrupt - or the code will be full of try_poke() every other line.

What about the mostly existing code that pokes port 0x80?  make it a
macro that also pokes the WDT?

If there are "long" sections for a single POST code, (like clearing 4GB
ECC ram), having a bit toggling would be less boring to watch anyhow.

I was reading datasheet for Intel 845 chipset, there seems to be a lot
of registers outside the reset domain of the processor.  Adding in a 3rd
poke of the POST code to a scratch register like that, would mean that
the last POST code before the WDT resets the CPU would be available to
the next incarnation (perhaps fallback).

-- 
Jeremy Jackson
Coplanar Networks
(519)489-4903
http://www.coplanar.net
jerj at coplanar.net





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