[coreboot] r659 - in coreboot-v3: arch/x86/geodelx northbridge/amd/geodelx

[svn at coreboot.org]

Author: hailfinger
Date: 2008-04-16 18:40:45 +0200 (Wed, 16 Apr 2008)
New Revision: 659

Modified:
   coreboot-v3/arch/x86/geodelx/geodelx.c
   coreboot-v3/northbridge/amd/geodelx/raminit.c
Log:
northbridge/amd/geodelx/raminit.c:auto_size_dimm() checks for the
mathematically impossible condition of a value being above and below the
specified range at the same time. Change it to check for out-of-range.
arch/x86/geodelx/geodelx.c:set_delay_control() is missing a break, it
will keep going and mess up DRAM timings.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Both changes look right to me.
Acked-by: Marc Jones <marc.jones at amd.com>


The raminit in v2 was fixed in r2899 | rminnich | 2007-10-26 with this
log:
> The lxraminit change fixes a bug (&& used instead of ||) [...]
> Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
> Acked-by: Peter Stuge <peter at stuge.se>


Modified: coreboot-v3/arch/x86/geodelx/geodelx.c
===================================================================
--- coreboot-v3/arch/x86/geodelx/geodelx.c	2008-04-14 14:19:09 UTC (rev 658)
+++ coreboot-v3/arch/x86/geodelx/geodelx.c	2008-04-16 16:40:45 UTC (rev 659)
@@ -386,6 +386,7 @@
 				msr.hi |= delay_control_table[i].fast_hi;
 				msr.lo |= delay_control_table[i].fast_low;
 			}
+			break;
 		}
 	}
 	wrmsr(GLCP_DELAY_CONTROLS, msr);

Modified: coreboot-v3/northbridge/amd/geodelx/raminit.c
===================================================================
--- coreboot-v3/northbridge/amd/geodelx/raminit.c	2008-04-14 14:19:09 UTC (rev 658)
+++ coreboot-v3/northbridge/amd/geodelx/raminit.c	2008-04-16 16:40:45 UTC (rev 659)
@@ -113,7 +113,7 @@
 	/* EEPROM byte usage: (5) Number of DIMM Banks */
 	banner(BIOS_DEBUG, "MODBANKS");
 	spd_byte = spd_read_byte(dimm, SPD_NUM_DIMM_BANKS);
-	if ((MIN_MOD_BANKS > spd_byte) && (spd_byte > MAX_MOD_BANKS)) {
+	if ((MIN_MOD_BANKS > spd_byte) || (spd_byte > MAX_MOD_BANKS)) {
 		printk(BIOS_EMERG, "Number of module banks not compatible\n");
 		post_code(ERROR_BANK_SET);
 		hlt();
@@ -124,7 +124,7 @@
 	/* EEPROM byte usage: (17) Number of Banks on SDRAM Device */
 	banner(BIOS_DEBUG, "FIELDBANKS");
 	spd_byte = spd_read_byte(dimm, SPD_NUM_BANKS_PER_SDRAM);
-	if ((MIN_DEV_BANKS > spd_byte) && (spd_byte > MAX_DEV_BANKS)) {
+	if ((MIN_DEV_BANKS > spd_byte) || (spd_byte > MAX_DEV_BANKS)) {
 		printk(BIOS_EMERG, "Number of device banks not compatible\n");
 		post_code(ERROR_BANK_SET);
 		hlt();