[coreboot] problem about ioapic
aaron.lwe at gmail.com
Sat Apr 19 07:37:11 CEST 2008
On Sat, Apr 19, 2008 at 5:01 AM, Rudolf Marek <r.marek at assembler.cz> wrote:
> What northbridge it is? I think you need two things:
> /* Set APIC to FSB message bus. */
> l = 0x3;
> val = l;
> l = (val & 0xFFFFFE) | 1;
> (this is in the vt8237r_lpc.c) so If you use this you should be safe.
> Second thing you need is to route the APIC messages through chipset
> I think this is D0F7/D11F7 0x7c bit 3. In fact you need to have correct
> values there for the whole 0x70-0x7f range.
> Also, it seems you will need some timer overrides:
> /* IRQ0 -> APIC IRQ2. */
> current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
> current, 0, 0, 2, 0x0);
The northbridge is CN700. I'll try this on Monday, thanks.
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