[coreboot] r3248 build service
info at coresystems.de
Wed Apr 23 01:02:16 CEST 2008
Dear coreboot readers!
This is the automated build check service of coreboot.
The developer "mjones" checked in revision 3248 to
the coreboot source repository and caused the following
Add early MSR and PCI register initialization.
This fixes many default setting as well as erratas.
Some CPU core functions were moved from the HT init and platform specific code to the generic Fam10 CPU code.
Signed-off-by: Marc Jones <marc.jones at amd.com>
Acked-by: Stefan Reinauer <stepan at coresystems.de>
Compilation of amd:serengeti_cheetah_fam10 has been broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3248&device=serengeti_cheetah_fam10&vendor=amd
If something broke during this checkin please be a pain
in mjones's neck until the issue is fixed.
If this issue is not fixed within 24h the revision should
be backed out.
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