[coreboot] [patch][v2][3/4] Family 10

[Marc Jones]

Stefan Reinauer wrote:
> * Marc Jones <Marc.Jones at amd.com> [080416 19:47]:
>> Find matching settings for each CPUs FID, VID, and P-state registers and
>> initialize them. Supports single and split plane systems. Set P0 on all
>> cores for best performance. All APs will be in hlt(C1).
>>
>> The platform warm rest logic has been updated to alway reset for HT and
>> FID/VID setup. It is not optional anymore.
>>
>> Signed-off-by: Marc Jones (marc.jones at amd.com)
>                             ^^^^^^^^^^^^^^^^^^^^^
> The script checks for <> instead of () so be careful when checking in..
> :-)
>  
> Acked-by: Stefan Reinauer <stepan at coresystems.de>
> 
> 

r3251

Thanks,
Marc

-- 
Marc Jones
Senior Firmware Engineer
(970) 226-9684 Office
mailto:Marc.Jones at amd.com
http://www.amd.com/embeddedprocessors