[coreboot] pci device memory allocation problem

aaron lwe aaron.lwe at gmail.com
Wed Apr 23 06:26:23 CEST 2008


I came across a problem recently about a pci ethernet card getting its
memory base address at 0xfec00000, which shouldn't happen since we
have already defiened DEVICE_MEM_HIGH as 0xFEBFFFFFUL in device.c.
This address should be reserved for IO-APIC or it might not function
I followed the code and found that in compute_allocate_resource when
we are going to assign a base address to a device, we are using a
align value that is at least min_align for that type of resource(for
mem it is 0xc). but in resource_max we get the maximum base address
using an align value that is root->resource[1].align. It might occur
that the devices all report that their align is 0x8 so the
bridge->align wouldn't be set to 0xc. and the problem occured. below
is an example:
ethernet card reports resource align 0x8, size 0x100.
root->resource[1] limit 0xfebfffff, size 0x100, align 0x8. so
resource_max returned 0xfebfff00, but when we are going to assign this
resource->base we are using align 0xc in compute_allocate_resource, so
its base would be 0xfec00000.
I think maybe we should add code like this in compute_allocate_resource:
/* Make certain we are dealing with a good minimum size */
 314                size = resource->size;
 315                align = resource->align;
 316                if (align < min_align) {
 317                        align = min_align;
                              bridge->align = align;
 318                }
to update the bridge's align value to be the same with the device's align value.

Am I correct?


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