[coreboot] k8 status

[Carl-Daniel Hailfinger]

On 24.08.2008 19:49, ron minnich wrote:
> Note there are things left to do that are not at first obvious
>
> 1. all core0's in initram have to load microcode
>   

This is going to hurt. You know that we only have 1k stack on all APs
(that includes core0 of every non-BSP)? With some ugly trickery, I think
2k stack are possible, but you don't want to go there. Our v3 functions
are not really optimized to fit into a small stack.

Loading microcode in initram also means we can't compress it because we
can't decompress to RAM. And it enforces special placement of microcode
in the LAR on boards like M57SLI rev 2.x.

> 2. as long as APs have to come up in initram, we might as well (last
> pass) fire up the core[1..n] and fix up their microcode too
>   

Can't we postpone microcode loading to stage2 or at least past initram?

> 3. PAE support is needed in initram
>   

Lots of code is broken w.r.t. addresses above 4G. For example, the LAR
code silently truncates all addresses to 32bit.

> This support all exists, it's just a matter of arranging it.
>   

I fear this might be a little more difficult than it looks at first
glance, but I'm sure you can do it.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/