[coreboot] v3 phase3/phase5 strangeness

ron minnich rminnich at gmail.com
Fri Aug 29 05:57:02 CEST 2008


This is one of those interesting hardware gotchas. What it boils down
to is that sometimes you need to enable a hardware resource to see
things "behind" it, even if you don't really intend to enable it.

Why do this? Because it is important to allocate resources -- memory
address space, io address space -- even if you don't enable in the
bios, because you might in the OS.

So you very explicitly have to violate the rules about ordering of
operations because you can't do resource scanning without enabling the
device.

Sorry if this is unclear.

ron




More information about the coreboot mailing list