[coreboot] [PATCH] Athlon64 K8 fixes

Marc Jones marcj303 at gmail.com
Mon Dec 1 18:19:04 CET 2008


On Mon, Nov 24, 2008 at 8:48 PM, ron minnich <rminnich at gmail.com> wrote:
> On Thu, Nov 20, 2008 at 5:28 AM, Robert Millan <rmh at aybabtu.com> wrote:
>
>> Okay.  Bit 29 is the easiest, as the spec reads "This bit should be set
>> if the 939 package is used."  This is enough for a single-DIMM setup to
>> work.
>
> I like this patch. I'd like to see marc ack it but:
> Acked-by: Ronald G. Minnich <rminnich at gmail.com>

I am a little hesitant to change this. Bit 28 and 29 were already
being set for all rev a-e processors. This will affect socket 754 and
940 platforms (which I assume are working) so we would need some
additional test coverage. I think that you will need to implement all
the settings in the bkdg section 4.1.3 Maximum DRAM Speed as a
Function of Loading for 2T settings.

I think that adding CPU_SOCKET_TYPE for the 754, 939 and 940 would be
a good. Maybe number them 0x07, 0x08, and 0x09. Update the
src\config\Options.lb to document the socket  numbers.

Marc

--




More information about the coreboot mailing list