[coreboot] v3 stage2 running from flash

ron minnich rminnich at gmail.com
Wed Dec 24 08:46:51 CET 2008

On Tue, Dec 23, 2008 at 10:02 PM, Corey Osgood <corey.osgood at gmail.com> wrote:
> Nevermind that question, I just (finally) found the code that handles that,
> and that is how it works, the segment is loaded from the ROM right before
> it's run. Is there any advantage/disadvantage to doing it that way instead
> of copying the whole LARball once and walking on RAM?

You can't copy the larball unless you have a mbyte of shadow ram somewhere.

Plus, a typical filo + coreboot is at around 64k -- you don't want to
copy a whole Mbyte just to get at 64k.

We need to solve your caching problem. I'm a bit concerned about the
"move mtrrs out of stage1" patch. I understand your goals with it and
it might even be right but ... I'm wondering if you are caching ROM. I
may have erred in acking that patch. Sorry. It did not impact kontron
(I tested it), and geode has no mtrr's, so it was hard for me to see
any negative impact. Myles, you have any thoughts here?


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