[coreboot] coreboot Digest, Vol 46, Issue 179

JasonZhao at viatech.com.cn JasonZhao at viatech.com.cn
Thu Dec 25 03:07:12 CET 2008

> On Wed, Dec 24, 2008 at 12:16:14AM +0100, Rudolf Marek wrote:
> >> The K8M890 BIOS needs int 0x15 0x5f18 to write to scratch register
> >> a driver the memory size of framebuffer and also the memory speed.
> >> X.org openchrome driver as well Unichrome driver needs that.
> [...]
> > diff --git a/src/vgahooks.c b/src/vgahooks.c
> > index 7c229ba..86050fd 100644
> > --- a/src/vgahooks.c
> > +++ b/src/vgahooks.c
> [...]
> > +    bdf = pci_find_device(PCI_VENDOR_ID_VIA, 0x3336); /* K8M890
> so far */
> [...]
> > +    bdf = pci_find_device(PCI_VENDOR_ID_AMD,
> PCI_DEVICE_ID_AMD_K8_NB_MEMCTL); /* get the memory speed */
I had added some very similar code on my VX800 port, except the location
of pci register that get speed of DDR2(mine is 0x90). I add those code
in both vgahook.c of Seabios and vgabios.c of Coreboot

> I thought the code would be vga chip dependent.  However, it looks
> like it depends on both the chipset and vga chip.
Yes chipset dependency
> It's going to be hard to maintain cpu and chipset specific features in
> SeaBIOS.  I wonder if we can find an alternative.
I also wonder.
> Can you provide more details on what you're seeing?  The VGA BIOS is
> calling int 155f18 and then populating a register in the vga card's
> pci config space?  If so, could coreboot populate the register
> directly?

Maybe 155f is VGABIOS dependent?  Yesterday, I test two different
VGABIOS on my VX800 board for my coreboot code. First one is extracted
from legacy bios on board, which doesn't play with my 155fcallback(s3
resume fails). Second one (I don't know where it is from), however,
seems work fine.

> -Kevin

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