[coreboot] [PATCH] v3: move CAR base and CAR size to invisible Kconfig

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Mon Feb 11 01:57:40 CET 2008

CAR size and CAR base defines are scattered all over the place. Set them
centrally from Kconfig, but keep the Kconfig variables hidden.
That way, they are available everywhere, you don't have to try to guess
where they are set, and they come with help text if you look at
No semantic changes, although some of the settings really could use an

This also is a requirement for my printk buffer patch.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: LinuxBIOSv3-carsize_Kconfig/include/arch/x86/amd_geodelx.h
--- LinuxBIOSv3-carsize_Kconfig/include/arch/x86/amd_geodelx.h	(Revision 586)
+++ LinuxBIOSv3-carsize_Kconfig/include/arch/x86/amd_geodelx.h	(Arbeitskopie)
@@ -565,8 +565,8 @@
 #define SMM_SIZE				128	/* changed SMM_SIZE from 256 KB to 128 KB */
 /* ------------------------  */
-#define DCACHE_RAM_SIZE 0x08000
-#define DCACHE_RAM_BASE 0x80000
 /* This is where the DCache will be mapped and be used as stack. It would be
  * cool if it was the same base as coreboot normal stack.
Index: LinuxBIOSv3-carsize_Kconfig/arch/x86/Kconfig
--- LinuxBIOSv3-carsize_Kconfig/arch/x86/Kconfig	(Revision 586)
+++ LinuxBIOSv3-carsize_Kconfig/arch/x86/Kconfig	(Arbeitskopie)
@@ -69,4 +69,17 @@
 	  coreboot work correctly on symmetric multi processor
 	  It is usually set in mainboard/*/Kconfig.
+config CARBASE
+	hex
+	default 0x8f000 if CPU_I586
+	default 0x80000 if CPU_AMD_GEODELX
+	help
+	  This option sets the base address of the area used for CAR.
+config CARSIZE
+	hex
+	default 0x1000 if CPU_I586
+	default 0x8000 if CPU_AMD_GEODELX
+	help
+	  This option sets the size of the area used for CAR.
Index: LinuxBIOSv3-carsize_Kconfig/arch/x86/stage0_i586.S
--- LinuxBIOSv3-carsize_Kconfig/arch/x86/stage0_i586.S	(Revision 586)
+++ LinuxBIOSv3-carsize_Kconfig/arch/x86/stage0_i586.S	(Arbeitskopie)
@@ -183,18 +183,9 @@
  * the other is very similar to the AMD CAR, except remove amd specific msr 
-#define CacheSize 4096
 #define CacheSize CONFIG_CARSIZE
-/* pick a safer value for default -- i.e. not the C segment! */
-#define CacheBase (0x90000 - CacheSize) 
 #define CacheBase CONFIG_CARBASE
 #define ASSEMBLY
 #include "mtrr.h"


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