[coreboot] m57sli VGA failure
ronald at zonnet.nl
Mon Feb 11 16:29:57 CET 2008
On Sun, 2008-02-10 at 20:11 -0500, Ward Vandewege wrote:
> Uhm - at this point I really want to know what hardware you have. Is this an
> SPI version of the m57sli? I've got several m57sli boards in production (both
> PLCC and SPI versions) that work just fine with coreboot.
I've got a m57sli rev.2.0 board (SPI) with Athlon64-X2 5600+
(winchester), 2GB RAM (2x1G), SATA2 hard disk and nvidia GeForce 8600 GT
256MB. I'm using coreboot v2 svn rev. 3100.
I've fitted a second SPI flash SST25VF016B (2MB) on the second land
pattern and installed a spdt switch on the CE pins.
I've modified the rom_stream to do pio mode read, because the lower
1.5MB of the flash is not readable memory mapped (thanks to the it8716f
superio). (see the previous email thread about the SST25VF016B on
m57sli) I'll post a patch when all is working here.
I've created an elf image from the normal kernel I also use when booting
with the proprietary bios and compressed it with lzma to make it fit in
The elfboot loads the image just fine, as far as I can see. Kernel
starts, but there are problems with VGA (rom signature wrong) and SATA
(irq routed wrong). I think that this last could be related with the
'noapic' kernel parameter, as the SATA irqs are 20, 23 and 21 (see
mptable.c). It also seems that the ACPI is still not working properly,
but that's for later.
Do you also use the 'noapic' parameter (like suggested in the tutorial)?
As a general rule, should the io, memory and irq mapping for the devices
be the same as when booted proprietary? If not, should this be reason
for concern and/or change?
I can send the complete messages on the serial port if you like too
Thanks to you too,
More information about the coreboot