[coreboot] Weirdness with lzma setting in v3

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Mon Feb 11 20:26:30 CET 2008


On 11.02.2008 19:13, Myles Watson wrote:
> On Feb 11, 2008 10:45 AM, Myles Watson <myles at pel.cs.byu.edu> wrote:
>   
>> http://www.pel.cs.byu.edu/~myles/build.lar.tmp.normal.stage2.tar.gz
>>     
>
> Here's the output from lar -v when trying to parse stage2:
>
>   LAR     build/coreboot.rom
> rm -f /home/myles/buildrom/try/buildrom/buildrom-devel/work/coreboot-v3/svn/build/coreboot.rom
> cd /home/myles/buildrom/try/buildrom/buildrom-devel/work/coreboot-v3/svn/build/lar.tmp
> && ../util/lar/lar -v -e -C lzma -c \
>                 ../coreboot.rom \
>                 nocompress:normal/initram normal/stage2
> nocompress:normal/option_table \
>                 -s 262144 -b
> /home/myles/buildrom/try/buildrom/buildrom-devel/work/coreboot-v3/svn/build/coreboot.bootblock
> Type 2 machine 3 version 1 entry 0x2000 phoff 52 shoff 38520 flags 0
> hsize 52 phentsize 32 phnum 3 s_hentsize 40 s_shnum 9
> output_elf_segments: header 0x2aaaaab0c000 #headers 3
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> New section addr 0xa1c0 size 0x2ed30
> (cleaned up) New section addr 0xa1c0 size 0x0x2ed30
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> New segment addr 0x8192lx size 0x28084lx offset 0x4096lx filesize 0x28084lx
> (cleaned up) New segment addr 0x2000 size 0x0x6db4 offset 0x1000
> Copy to 0x2000 from 0x2aaaaab0d000 for 28084 bytes
> entry 8192x loadaddr 8192x
> New segment addr 0x36864lx size 0x196336lx offset 0x32768lx filesize 0x4540lx
> (cleaned up) New segment addr 0x9000 size 0x0x11bc offset 0x8000
> Copy to 0x9000 from 0x2aaaaab14000 for 4540 bytes
> entry 8192x loadaddr 36864x
> Dropping non PT_LOAD segment
> Type 2 machine 3 version 1 entry 0x42 phoff 52 shoff 660 flags 0 hsize
> 52 phentsize 32 phnum 2 s_hentsize 40 s_shnum 9
> output_elf_segments: header 0x2aaaaab19000 #headers 2
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> Dropping non SHT_NOBITS section
> New segment addr 0x0lx size 0x432lx offset 0x116lx filesize 0x432lx
> (cleaned up) New segment addr (nil) size 0x0x1b0 offset 0x74
> Copy to (nil) from 0x2aaaaab19074 for 432 bytes
> entry 66x loadaddr 0x
> Dropping non PT_LOAD segment
> # QEMU wants bios.bin:
> # Run "qemu -L build/ -serial stdio -hda /dev/zero".
> printf "  CP      build/bios.bin\n"
>   CP      build/bios.bin
>   

Are you doing this on a 64bit machine? I tested your stage2 file and it
was parsed correctly on my OpenSUSE 10.3 32bit machine. But it looks
like a bug in lar. I have no idea whether the lar and lzma code were
audited to be 64bit clean.

Can you compile a 32bit version of build/util/lar/lar and look whether
that works?

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/





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