[coreboot] [LinuxBIOS] Intel microcode revision code
stepan at coresystems.de
Wed Feb 20 17:19:10 CET 2008
* ron minnich <rminnich at gmail.com> [071212 17:19]:
> > Question to you guys: why is the first wrmsr instruction there? From my
> > understanding, by not properly initialising ECX, EAX and EDX this will
> > overwrite whatever is in the MSR pointed to by ECX?!
> > BTW I tried out your code on our target hardware (Intel Celeron M, 600 MHz)
> > and with that first wrmsr line in place it hangs and without it, it runs
> > just fine.
> Thanks Martin. That looks like quite a nice bug catch you've done :-)
Here's a patch that resolves the issue.
coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br.
Tel.: +49 761 7668825 • Fax: +49 761 7664613
Email: info at coresystems.de • http://www.coresystems.de/
Registergericht: Amtsgericht Freiburg • HRB 7656
Geschäftsführer: Stefan Reinauer • Ust-IdNr.: DE245674866
-------------- next part --------------
A non-text attachment was scrubbed...
Size: 660 bytes
Desc: not available
More information about the coreboot