[coreboot] r3112 build service

[coreboot information]

Dear coreboot readers!

This is the automated build check service of coreboot.

The developer "stepan" checked in revision 3112 to
the coreboot source repository and caused the following 
changes:

Change Log:
Route device IRQ through PCI bridge instead in mptable.
Don't enable pin0 for ioapic of io-4.

1. apic error in kernel for MB with mcp55+io55
2. some pcie-cards could have pci bridge there, so need to put entries
   for device under them in mptable.

Signed-off-by: Yinghai Lu <yinghailu at gmail.com>
Acked-by: Stefan Reinauer <stepan at coresystems.de>



Build Log:
Compilation of amd:serengeti_cheetah_fam10 is still broken
See the error log at http://qa.coreboot.org/log_buildbrd.php?revision=3112&device=serengeti_cheetah_fam10&vendor=amd


If something broke during this checkin please be a pain 
in stepan's neck until the issue is fixed.

If this issue is not fixed within 24h the revision should 
be backed out.

   Best regards,
     coreboot automatic build system