[LinuxBIOS] flashrom on ga 2761gxdk

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Thu Jan 10 13:12:49 CET 2008


On 10.01.2008 05:16, ron minnich wrote:
> verbose output attached. With the patch, it no longer finds the flash part.
>   

Ah ok, I misunderstood. I thought the routine was unable to find the
port. Looking at the log, we see:

> LPC write to serial flash disabled
>   

Which naturally means all writes will never reach the chip. Try the
patch below:

Enable LPC write cycle to SPI write cycle translation for IT8716F.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: flashrom-ron/spi.c
===================================================================
--- flashrom-ron/spi.c	(Revision 3036)
+++ flashrom-ron/spi.c	(Arbeitskopie)
@@ -136,6 +136,11 @@
 			0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
 		printf("LPC write to serial flash %sabled\n",
 			(tmp & 1 << 4) ? "en" : "dis");
+		if (!(tmp & 1 << 4)) {
+			printf("Force enabling LPC write to serial flash\n");
+			tmp |= 1 << 4;
+			regwrite(port, 0x24, tmp);
+		}
 		printf("serial flash pin %i\n",	(tmp & 1 << 5) ? 87 : 29);
 		/* LDN 0x7, reg 0x64/0x65 */
 		regwrite(port, 0x07, 0x7);



> Serial flash segment 0xfffe0000-0xffffffff enabled
> Serial flash segment 0x000e0000-0x000fffff enabled
> Serial flash segment 0xffee0000-0xffefffff disabled
> Serial flash segment 0xfff80000-0xfffeffff enabled
>   

That's the next problem. Do you see the gaps and overlaps between
ranges? It seems it is entirely impossible to map flash to the
0xfff00000-0xfff7ffff range. Then again, this might be a data sheet bug.
I'm reasonably sure a dump of the 1 MByte chip (if that chip has
different contents in the upper and lower 512 kByte) will clear up any
misunderstandings.


Regards,
Carl-Daniel




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