[LinuxBIOS] Please add support for MX25L8005 and MX25L3205D
c-d.hailfinger.devel.2006 at gmx.net
Fri Jan 11 03:18:04 CET 2008
On 11.01.2008 02:42, Peter Stuge wrote:
> On Thu, Jan 10, 2008 at 03:16:16PM +0100, Carl-Daniel Hailfinger wrote:
>> It seems we can't support any flash chip bigger than 512 kByte on a
>> board using IT8716F SPI translation without a LOT of effort.
> Please explain further?
The IT8716F datasheet suggests that LPC-to-SPI translation is limited to
one 512 kByte area and one disjoint 128 kByte area. It is not specified
to which addresses of the flash chip the 128 kByte area is decoded. All
accesses outside this area will have to be read in 2-byte chunks by
issuing a read command to the SPI controller. Memory mapping such
accesses seems to be impossible according to the datasheet. Writing is
even worse: You can only program chips which support the byte-program
instruction because sending more than 5 bytes to the SPI chip (1 opcode,
3 address, 1 data) is not possible outside the natively decoded area.
Every routine accessing ROM has to be rewritten to use "retrieve these
bytes" helper routines. String comparisons etc. will not work unless you
hand-code them. LAR walking will be real fun.
The only way to not get a headache would be to access only the given 512
kByte area before RAM is enabled, then directly after enabling RAM copy
ROM contents with the read-2-bytes method to RAM and work from RAM.
I still hope ITE engineers will tell me about a way to avoid all this
horrible stuff. The datasheet surely does not leave much hope.
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