[coreboot] CN700 with a KVR533D2N4/512 memory module
Urbez Santana Roma
urbez at linuxupc.upc.edu
Wed Jan 16 21:40:56 CET 2008
If you have read my last message, i comment that
memory works if i change the values of do_ram_command
functions in sdram_enable() written by Corey Osgood for
the CN700 with a C7 CPU. When is used with KVR533D2N4/512
module, the memory not works, but i have finally, changing
the values that works fine, with execution of branch instructions
if i use the values:
..... part of src/northbrigde/cn700/raminit.c .....
// 6. Mode register set.
PRINT_DEBUG_MEM("RAM Enable 4: Mode register set\r\n");
//safe value for now, BL=8, WR=5, CAS=5
/* (E)MRS values are from the BPG. No direct explanation is given, but
* they should somehow conform to the JEDEC DDR2 SDRAM Specification
* (JESD79-2C). */
// do_ram_command( RAM_COMMAND_MRS, 0x0022d8);//by Corey
do_ram_command( RAM_COMMAND_MRS, 0x1022d8);//With the 20 bit ON.
// 7. Mode register set.
PRINT_DEBUG_MEM("RAM Enable 4: Mode register set\r\n");
// do_ram_command( RAM_COMMAND_MRS, 0x21c20);//default OCD calibration
by Corey
do_ram_command( RAM_COMMAND_MRS, 0x121c20);//With the 20 bit ON.
// do_ram_command( RAM_COMMAND_MRS, 0x20020);//exit calibration mode
do_ram_command( RAM_COMMAND_MRS, 0x120020);//With the 20 bit ON.
// 8. Normal operation
PRINT_DEBUG_MEM("RAM Enable 5: Normal operation\r\n");
do_ram_command( RAM_COMMAND_NORMAL, 0);
.....end part of src/borthbrigde/cn700/raminit.c.....
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