[coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F).
ronald at zonnet.nl
Thu Jan 17 20:52:05 CET 2008
On Thu, 2008-01-17 at 01:24 +0100, Carl-Daniel Hailfinger wrote:
> On 17.01.2008 00:13, Ronald Hoogenboom wrote:
> > I mounted a SST25VF016B 2MByte flash chip on the second SPI bios
> > 33MHz) is negligible.
> Please be aware that the M57SLI may read the reset vector and other
> really early stuff at 33 MHz, thereby causing read errors (sometimes
> single bit shifts) which are really hard to find.
As far as I've seen the default io speed setting is 33/2, see the table
in sect. 22.214.171.124 on page 78. So I hope (if the datasheet is correct)
everything is done at low speed initially, which is GOOD ;-).
What I've seen is that the memory mapped area from fff80000 to ffffffff
is the top quarter of the 2MB flash rom, so it should be the intended
contents at the correct location, as the linuxbios code is located there
at the top and the elf payload at the bottom.
Probably the IT8716 doesn't do any address translation at all and the
flash chip just ignores the upper address bits (just like when
block-reading past the top of the chips address space).
More information about the coreboot