[coreboot] Config.lb versus static.c inconsistency.

Steve Isaacs yasteve at gmail.com
Fri Jan 18 01:10:01 CET 2008


On Fri, 2008-01-18 at 00:39 +0100, Peter Stuge wrote:
> On Thu, Jan 17, 2008 at 01:19:39PM -0800, Steve Isaacs wrote:
> > pci_probe_dev:PCI: 00:03.6 [14e4/b514] enabled
> > pci_probe_dev:PCI: 00:03.7 [14e4/b514] enabled
> > pci_probe_dev:dev->device 0x00000420 dev->ops 0x00011D80 disabled
> > pci_probe_dev:PCI: 00:04.0 [1166/0420] disabled
> > pci_probe_dev:PCI: 00:04.1 [1166/042a] enabled
> > pci_probe_dev:PCI: 00:05.0 [1166/0422] disabled
> > pci_probe_dev:PCI: 00:05.1 [1166/042a] enabled
> > 
> > The device 00:04.0 is a PCIe bridge.
> > 
> > Here's an excerpt from Config.lb for that device. Note that it is
> > configured to be "on".
> > 
> >          end
> >           device pci 3.0 on     # EXB0 0x0420 -- Essential
> >           end
> >           device pci 3.1 on     # IOMMU 0x042A -- Essential
> >           end
> >           device pci 4.0 on     # EXB1 0x0422
> 
> I note that the PCI ids in your comments don't match the debug
> output. They seem to be offset by 1.
> 

Yes, this confuses me too. It's because (I've learned) the config is 0
based while the others are 1 based. I believe this is because of the
config being relative to the southbridge (meaning an offset from) rather
than the actual device ID. Although I could be wrong. I'm not an expert
with this.

> 
> > And, finally, here's an excerpt from the generated static.c for the
> > same device.
> > 
> > struct device _dev56 = {
> >         .ops = 0,
> >         .bus = &_dev8.link[1],
> >         .path = {.type=DEVICE_PATH_PCI,.u={.pci={ .devfn =
> > PCI_DEVFN(0x3,0)}}},
> 
> And which device is this actually? :)
> 
> 
It's the PCI_DEVFN macro that's the key. This is the 00:04.00 (as seen
in the pci scan) or 3.0 as seen in Config.lb.

Steve





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