[coreboot] SST25VF016B (2MB) flash on m57sli (IT8716F).

Harald Gutmann harald.gutmann at gmx.net
Tue Jan 22 12:08:01 CET 2008


Am Dienstag, 22. Januar 2008 01:09:09 schrieben Sie:
> Harald: This patch should fix your problems writing to the chip. Use
> either "patch -l" or remove the // before
> //while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
I've updated my flashrom tree to revision 3068 and commented that line out.
Now i can flash the chip, like Ronald says. I wrote the chip, and read the 
file again, and compared the start and the end of the file with 
hexdump/head/tail and diff. On the first/last 50000 lines there is no 
difference between the file which was written to the chip, and the file i've 
read with flashrom from the chip.

Any idea why verifying fails?


> Ronald: I need an ack to commit this.
>
> On 20.01.2008 11:59, Ronald Hoogenboom wrote:
> > Carl-Daniel Hailfinger wrote:
> >> Did you have time to test with the while
> >> (generic_spi_read_status_register() & .._WIP) enabled? It would be more
> >> correct to have it enabled.
> >
> > I had that in initially (that's why it was there, but commented out) but
> > all it got me was slower programming times and the datasheet also
> > suggests it is ok to just do a timed wait. But in the face of
> > genericness for other chips, it is indeed more correct to do the check
> > for the busy bit.
>
> Ronald/Harald, can you please ack the change? It is reproduced below
> (whichspace-damaged).
>
> Regards,
> Carl-Daniel
>
> Make sure we delay writing the next byte long enough in SPI byte
> programming.
> Minor formatting changes.
>
> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>
Acked-by: Harald Gutmann <harald.gutmann at gmx.net>

>
>
> Index: spi.c
> ===================================================================
> --- spi.c	(Revision 3068)
> +++ spi.c	(Arbeitskopie)
> @@ -519,12 +519,8 @@
>  	for (i=0; i<total_size; i++) {
>  		generic_spi_write_enable();
>  		spi_byte_program(i,buf[i]);
> -		/* FIXME: We really should read the status register and delay
> -		 * accordingly.
> -		 */
> -		//while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
> +		while (generic_spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
>  		myusec_delay(10);
>  		//if (i%1024==0) fputc('b',stderr);
>  	}
>
>
> Regards,
> Carl-Daniel
Regards, Harald





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