[coreboot] [Fwd: [patch][v2] cs5536 usb port4 configuration]

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sat Jul 12 01:44:20 CEST 2008


On 12.07.2008 01:26, Marc Jones wrote:
> This patch seems to have fallen through the cracks.
> ACKs?

I'm not sure whether the code in v2 should deviate from the code in v3.
Ron committed the following in r689 to v3 (excerpted):

Index: southbridge/amd/cs5536/cs5536.c
===================================================================
--- southbridge/amd/cs5536/cs5536.c	(Revision 688)
+++ southbridge/amd/cs5536/cs5536.c	(Revision 689)
@@ -395,18 +395,19 @@
 	}
 }
 
-#define HCCPARAMS		0x08
-#define IPREG04			0xA0
+/* the /sizeof(u32) is to convert byte offsets into u32 offsets */
+#define HCCPARAMS		(0x08/sizeof(u32))
+#define IPREG04			(0xA0/sizeof(u32))
 #define USB_HCCPW_SET		(1 << 1)
 #define UOCCAP			0x00
 #define APU_SET			(1 << 15)
-#define UOCMUX			0x04
+#define UOCMUX			(0x04/sizeof(u32))
 #define PMUX_HOST		0x02
 #define PMUX_DEVICE		0x03
 #define PUEN_SET		(1 << 2)
-#define UDCDEVCTL		0x404
+#define UDCDEVCTL		(0x404/sizeof(u32))
 #define UDC_SD_SET		(1 << 10)
-#define UOCCTL			0x0C
+#define UOCCTL			(0x0C/sizeof(u32))
 #define PADEN_SET		(1 << 7)
 
 /**


I do not have a strong opinion either way. What do you think?

Regards,
Carl-Daniel





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