[coreboot] [PATCH] artecgroup/dbe61: Sync irq_tables with dbe62 code to fix compilation and have a chance of working properly.

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Fri May 9 00:27:25 CEST 2008


could you take a look at the question at the end of this mail?

On 08.05.2008 07:39, Mart Raudsepp wrote:
>> On 07.05.2008 23:28, Mart Raudsepp wrote:
>>> Here's a patch that fixes DBE61 target compilation by making
>>> irq_tables.h
>>> take the v3 approach. It might actually work on hardware regarding
>>> interrupt setup, but we need to get the raminit to work properly to
>>> see...
>>> so this is in the name of compilation fix and common sense that as all
>>> the
>>> IRQ routing is the same in DBE61 and DBE62, that the routing settings in
>>> dbe62 code should be fine for dbe61 as well.
>> Well, if the IRQ routing is the same in DBE61 and DBE62, why do the
>> tables differ after your patch?
> They differ in the interrupt router and IRQs devoted fields only, as told
> in the proposed commit message on top of the attachment together with the
> reason. And the vendor/device are AMD instead of NSC I believe. The
> interrupt line routing tuples are the same and it makes it compile and not
> worse.

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

> What does "IRQs devoted exclusively to PCI usage" value affect?

No idea.


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