[coreboot] proposed patch, notsigned off, comments welcome.

ron minnich rminnich at gmail.com
Mon May 12 17:51:53 CEST 2008


Version latest: There may be a bug in the code but ... if not, the map
for C and D looks wrong.


input enable 0f7af085 invert 0xcf7e3081
irqmap from vr is 0xd0c0700
4d1:4d0 0e00
GPIOmap (e0 to e8): 0/20000001 4/00430000 8/00000000 12/00000000
INTA, GPIO pin 0
Input Enabled and Inverted
Interrupt:IG 1
INTB, GPIO pin 7
Input Enabled and Inverted
Interrupt:IG 2
INTC, GPIO pin 12
Input Enabled and Inverted
Interrupt:IG 0
INTD, GPIO pin 13
Input Enabled and Inverted
Interrupt:IG 0

thanks

ron
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