[coreboot] proposed patch, notsigned off, comments welcome.

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Tue May 13 15:18:16 CEST 2008


On 13.05.2008 07:01, ron minnich wrote:
> Hmm. alix1c prod. bios is different:
> 1. ACPI tables.
> 2. input enable 0b7af485 invert 0xcf7e3081
> irqmap from vr is 0xd0c0700
> 4d1:4d0 0e00
> GPIOmap (e0 to e8): 0/20000001 4/08051340 8/61000e00 12/00000000
> GPIO0: Interrupt:IG 1
> GPIO7: Interrupt:IG 2
> GPIO12: Interrupt:IG 3
> GPIO13: Interrupt:IG 4
> GPIO25: PME:IG 7
> GPIO26: PME:IG 6
> MSR 0x51400023: 0xbaba2
>
> MSR 0x51400024: 0xffff
>
> INTA, GPIO pin 0;Input Enabled and Inverted,Interrupt:GPIO BIT 1,IG
> 10,Not masked,
> INTB, GPIO pin 7;Input Enabled and Inverted,Interrupt:GPIO BIT 2,IG
> 11,Not masked,
> INTC, GPIO pin 12;Input Enabled and Inverted,Interrupt:GPIO BIT 3,IG
> 10,Not masked,
> INTD, GPIO pin 13;Input Enabled and Inverted,Interrupt:GPIO BIT 4,IG
> 11,Not masked,
>
> They only use IRQs 11/10, not 9.
>
> Also:
> 00:01.0 Host bridge: Advanced Micro Devices [AMD] CS5536 [Geode
> companion] Host Bridge (rev 31)
> 00:01.1 VGA compatible controller: Advanced Micro Devices [AMD] Geode LX Video
> 00:01.2 Entertainment encryption device: Advanced Micro Devices [AMD]
> Geode LX AES Security Block
> 00:0c.0 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1
> Controller (rev 61)
> 00:0c.1 USB Controller: VIA Technologies, Inc. VT82xxxxx UHCI USB 1.1
> Controller (rev 61)
> 00:0c.2 USB Controller: VIA Technologies, Inc. USB 2.0 (rev 63)
> 00:0d.0 Ethernet controller: VIA Technologies, Inc. VT6105M [Rhine-III] (rev 96)
> 00:0f.0 ISA bridge: Advanced Micro Devices [AMD] CS5536 [Geode
> companion] ISA (rev 03)
> 00:0f.2 IDE interface: Advanced Micro Devices [AMD] CS5536 [Geode
> companion] IDE (rev 01)
> 00:0f.3 Multimedia audio controller: Advanced Micro Devices [AMD]
> CS5536 [Geode companion] Audio (re)
> 00:0f.4 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode
> companion] OHC (rev 02)
> 00:0f.5 USB Controller: Advanced Micro Devices [AMD] CS5536 [Geode
> companion] EHC (rev 02)
> pbx ~ # lspci -v -v -v | grep Int
> -v -v -v | grep Int
>         Interrupt: pin A routed to IRQ 10
>         Interrupt: pin A routed to IRQ 10
>         Interrupt: pin A routed to IRQ 10
>         Interrupt: pin B routed to IRQ 11
>         Interrupt: pin C routed to IRQ 10
>         Interrupt: pin A routed to IRQ 11
>         Interrupt: pin B routed to IRQ 11
>         Interrupt: pin D routed to IRQ 11
>         Interrupt: pin D routed to IRQ 5
>
> The last USB is IRQ 5 ...
>
> OK, that is it for me.
>   

How about we try to partially imitate the vendor BIOS? With the time
constraints we have, getting it to work first, then understanding it so
we can change it as we want is probably the way to go.

Patch follows. I'd be very interested in lxirq output of the alix1c with
this patch applied.

Regards,
Carl-Daniel

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>

Index: LinuxBIOSv3-alix1c/mainboard/pcengines/alix1c/irq_tables.h
===================================================================
--- LinuxBIOSv3-alix1c/mainboard/pcengines/alix1c/irq_tables.h	(Revision 682)
+++ LinuxBIOSv3-alix1c/mainboard/pcengines/alix1c/irq_tables.h	(Arbeitskopie)
@@ -23,10 +23,10 @@
 #define IRQ_SLOT_COUNT 5
 
 /* Platform IRQs */
-#define PIRQA 11
-#define PIRQB 10
-#define PIRQC 11
-#define PIRQD 9
+#define PIRQA 10
+#define PIRQB 11
+#define PIRQC 10
+#define PIRQD 11
 
 /* Map */
 #define M_PIRQA (1 << PIRQA)	/* Bitmap of supported IRQs */






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