[coreboot] Add support for SPI-Chips on ICH9 to flash rom / corrected

[Carl-Daniel Hailfinger]

On 13.05.2008 15:14, Peter Stuge wrote:
> On Tue, May 13, 2008 at 01:56:38PM +0200, Uwe Hermann wrote:
>   
>>> +	{"ST",		"M25P40 at ICH9",		ST_ID,		ST_M25P40,		512,	64 * 1024,	TEST_UNTESTED,	probe_ichspi_stm25_sig,	erase_ichspi,		write_ichspi, read_ichspi},
>>> +	{"ST",		"M25P80 at ICH9",		ST_ID,		ST_M25P80,		1024,	64 * 1024,	TEST_UNTESTED,	probe_ichspi_stm25_sig,	erase_ichspi,		write_ichspi, read_ichspi},
>>> +	{"ST",		"M25P16 at ICH9",		ST_ID,		ST_M25P16,		2048,	64 * 1024,	TEST_UNTESTED,	probe_ichspi_stm25,	erase_ichspi,		write_ichspi, read_ichspi},
>>> +	{"ST",		"M25P32 at ICH9",		ST_ID,		ST_M25P32,		4096,	64 * 1024,	TEST_UNTESTED,	probe_ichspi_stm25,		erase_ichspi,		write_ichspi, read_ichspi},
>>> +	{"ST",		"M25P64 at ICH9",		ST_ID,		ST_M25P64,		8192,	64 * 1024,	TEST_UNTESTED,	probe_ichspi_stm25,		erase_ichspi,		write_ichspi, read_ichspi},
>>>       
>> Why "@ICH9", does the chip behave differently depending on where
>> you plug it in?
>>     
>
> How to program an SPI flash chip depends on both the chip type, and
> the SPI master type. (Ie which superio/southbridge it is connected
> to.)
>
> Currently, flashrom does not have infrastructure that can deal with a
> non-transparent flash memory bus master, so the support for these
> flash chips that Claus is proposing will only work on ICH9 systems.
>
> This sucks of course, but it is a flaw of flashrom and I do think it
> is OK to include Claus' changes because they do work for him.
>
> It is too much to expect a brand new contributor to rewrite the SPI
> infrastructure in flashrom. That will come, I know Carl-Daniel has
> ideas.
>   

Once the RES support patch is merged (I'm waiting for Fredrik Tolf to
signoff it and Peter Stuge to ack it) and we have a deal about the
"flags" field in struct flashchip, it will be easy to integrate ICH9
support into flashrom.


Regards,
Carl-Daniel