[coreboot] [PATCH] flashrom: restructure SPI support, part 3

[Carl-Daniel Hailfinger]

On 14.05.2008 00:01, Ward Vandewege wrote:
> On Tue, May 13, 2008 at 05:33:44PM +0200, Carl-Daniel Hailfinger wrote:
>   
>> flashrom: Move all IT87xx specific SPI routines from spi.c to a separate
>> file it87spi.c.
>> No behavioural changes, but greatly improved SPI abstraction.
>>     
>
> Hmm. I have a hardware-modded board with 2 chips and a switch. The mod might
> be a bit flakey, I see odd stuff sometimes (it will erase both chips
> regardless of position of switch, but it always only programs the right
> chip). So the fact that flashrom sees 2 chips might be an artifact of that
> problem, but maybe not...
>   

Yes, that problem was introduced with r3291.

> Switch in position 1:
>
> # ./flashrom -m m57sli -V
> Probing for Macronix MX25L4005, 512 KB: RDID returned c2 20 13.
> probe_spi: id1 0xc2, id2 0x2013
> Chip status register is 00
> Chip status register: Status Register Write Disable (SRWD) is not set
> Chip status register: Bit 6 is not set
> Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
> Chip status register: Bit 4 / Block Protect 2 (BP2) is not set
> Chip status register: Bit 3 / Block Protect 1 (BP1) is not set
> Chip status register: Bit 2 / Block Protect 0 (BP0) is not set
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> MX25L4005 found at physical address 0xfff80000.
> [...]
> Probing for Macronix unknown SPI chip, 0 KB: RDID returned c2 20 13.
> probe_spi: id1 0xc2, id2 0x2013
> unknown SPI chip found at physical address 0x0.
> [...]
> Multiple flash chips were detected: MX25L4005 unknown SPI chip
> Please specify which chip to use with the -c <chipname> option.
>
> ---------------------------------------------------------------------
>
> And after flipping the switch:
>
> ---------------------------------------------------------------------
>
> # ./flashrom -m m57sli -V
> Probing for SST SST25VF016B, 2048 KB: RDID returned bf 25 41.
> probe_spi: id1 0xbf, id2 0x2541
> Chip status register is 1c
> Chip status register: Block Protect Write Disable (BPL) is not set
> Chip status register: Auto Address Increment Programming (AAI) is not set
> Chip status register: Bit 5 / Block Protect 3 (BP3) is not set
> Chip status register: Bit 4 / Block Protect 2 (BP2) is set
> Chip status register: Bit 3 / Block Protect 1 (BP1) is set
> Chip status register: Bit 2 / Block Protect 0 (BP0) is set
> Chip status register: Write Enable Latch (WEL) is not set
> Chip status register: Write In Progress (WIP/BUSY) is not set
> Resulting block protection : all
> SST25VF016B found at physical address 0xffe00000.
> [...]
> Probing for SST unknown SPI chip, 0 KB: RDID returned bf 25 41.
> probe_spi: id1 0xbf, id2 0x2541
> unknown SPI chip found at physical address 0x0.
> [...]
> Multiple flash chips were detected: SST25VF016B unknown SPI chip
> Please specify which chip to use with the -c <chipname> option.
>
> ---------------------------------------------------------------------
>
> Well, looks like you are right, no behavioural changes, this is an unpatched
> r3303:
>   

Good. Can you ack the change after testing wth flashrom -c $FLASHCHIP?


Regards,
Carl-Daniel