[coreboot] Add support for SPI-Chips on ICH9 to flash rom / please delete the last mail

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Wed May 14 17:11:59 CEST 2008


On 14.05.2008 16:17, Carl-Daniel Hailfinger wrote:
> Hi Claus,
> hi Dominik,
>
> On 14.05.2008 08:23, Claus Gindhart wrote:
>   
>> Hi Carl-Daniel,
>>
>> my colleague Dominik will investigate into this; we will provide a new patch 
>> within the next few days.
>>   
>>     
>
> Thanks. By the way, the ICH8 datasheet says your code will not work with
> ICH8 (wrong SPIBAR address), so you might want to remove ICH8 bits from
> the patch. Hardcoding the RCRB address is a problem as well.
>
> I have sent another patch a few minutes ago which will allow you to
> replace is_supported_chipset() with ich9_detected and
> curflash->virtual_registers with *ich_spibar. That patch also calculates
> the correct RCRB address and the correct SPIBAR address. The subject of
> the mail was "[coreboot] [PATCH] flashrom: Infrastructure for ICH9 merge".
>   

That patch has been merged in r3314. You can also drop
munmap_ich_registers() and map_ich_registers() now.

If you can create a wrapper for run_opcode() which can be called from
spi_command(), you should be able to drop ~80% of the code in ichspi.c.
Such a wrapper would look up the opcode from spi_command() in the list
of programmed opcodes and convert the arguments. AFAICS this should be easy.

Regards,
Carl-Daniel




More information about the coreboot mailing list