[coreboot] LinuxTag presentation highlights

Stefan Reinauer stepan at coresystems.de
Thu May 22 20:03:44 CEST 2008

On 22.05.2008, at 18:23, Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net 
 > wrote:
> 10. Recompilation of the whole firmware with arbitrary features takes
> 10-30 seconds

I tweaked abuild a bit to compile in parallel. Compilation on my quad  
core machine takes 3 seconds for a full featured v2 port. A test cycle  
with the Artec LPC dongle takes 28s including compilation and flashing  
of a 8MBit image... Beat that during development with any other  
firmware :-)


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