[coreboot] via epia-cn and v3

Carl-Daniel Hailfinger c-d.hailfinger.devel.2006 at gmx.net
Sat Nov 1 02:13:24 CET 2008


On 31.10.2008 23:40, ron minnich wrote:
> coreboot-3.0.974 Fri Oct 31 15:11:04 PDT 2008 starting... (console_loglevel=8)
> [...]
> Done RAM init code
> In hardware_stage1()
>
> resets at this point and restarts. Very slow, as though it were not caching ROM?
>   

Yes, ROM may not be cached. My primary goal was to get this to work at all.

And the reset issue is currently my highest priority problem to resolve.
I believe I may have to disappoint you and change the memcpy to an
open-coded copy in asm.

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/





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