[coreboot] [PATCH] CN700/VT8237R stage2

[Carl-Daniel Hailfinger]

On 01.11.2008 06:08, Corey Osgood wrote:
> On Sat, Nov 1, 2008 at 1:06 AM, Corey Osgood <corey.osgood at gmail.com> wrote:
>
>   
>> Debug log attached, I'm using COM2 so I modified the patch to use $760
>> instead of $1016, I hope that's right. I'm honestly not sure if the output
>> is what you were expecting or not, I don't think it is though. One thing I
>> noticed in the build log, with or without the patch, dunno if it matters or
>> not:
>>
>> /home/corey/coreboot/coreboot-v3/arch/x86/via/stage1.c: In function
>> 'disable_car':
>> /home/corey/coreboot/coreboot-v3/arch/x86/via/stage1.c:49: warning: passing
>> argument 1 of 'memcpy' discards qualifiers from pointer target type
>>
>> Thanks,
>> Corey
>>     
>
>
> I should have also mentioned that I didn't trim anything, the serial console
> hangs at the end of the log file, but the post code keeps changing, so I'm
> assuming something is going on but nothing's going to the console.
>   

Thanks. I now understand where parts of the garbage come from. Can you
try the attached patch? It should require no further fixups for COM2.

It would be great if you could use various values between 0 and 13
(inclusive) for the #define HALT_AFTER. The idea there is to
decrease/increase the value up to the biggest value where it doesn't
reboot automatically. The POST codes emitted by the diagnostic code
should be between 0xC0 and 0xCD. The last expected POST code for a given
HALT_AFTER is 0xC0+HALT_AFTER.

I'm also increasingly convinced that RAM is not working right,
especially for the area we use as stack. Can you enable ram_check() in
mainboard/.../initram.c again?

Regards,
Carl-Daniel

-- 
http://www.hailfinger.org/

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