[coreboot] Supporting boards with NAND flash on other chip selects than CS0

Mart Raudsepp mart.raudsepp at artecdesign.ee
Thu Nov 6 19:01:29 CET 2008

Ühel kenal päeval, N, 2008-11-06 kell 08:06, kirjutas ron minnich:
> I like your idea of making the variable non-boolean. It makes sense,
> and we did not intend the dts to just be booleans. People are starting
> to really use the dts as we intended now.
> Overall it's a good patch, modulo the fixes carl-daniel pointed out.
> Can you revise and resubmit?

r985. Was waiting for work day end before simply git svn dcommit'ing to
get any further comments.
Mainly because I'm not all that happy with it myself, as it does lose
code - even though code whose functionality can't be used without
board-specific configuration support which doesn't exist.

So I have two concerns here (or lets say things we might want to work on
on top of this):

* There is no way to specify more than one NAND, or extra NOR setup, or
different NAND mapping (page size?), etc. Basically all the arguments in
the previous FlashInitTable structure - you could tell type, interface
and mask separately for each chip select. If that possibility might be
necessary for some boards in the future, then some more extensive
support in dts is needed. The main problem here is that the code
handling such an extensive struct configuration is now deleted (though
of course visible in SVN history if you know to look).
That said, I'm not even sure any of the other possibilities many any
sense in context of CS5536 - more than one NAND or different types, or
different mapping than 4K.

* CS1 counter-intuitively wanting enable_ide_nand_flash="2", etc. At
least that's commented in the southbridge dts' above the default

Mart Raudespp

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